r300: remove unused SSG lowering

Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Filip Gawin <filip.gawin@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23642>
This commit is contained in:
Pavel Ondračka
2023-06-14 08:36:08 +02:00
committed by Marge Bot
parent 3a3b9b7a63
commit e16894fb5a
4 changed files with 0 additions and 87 deletions
@@ -296,13 +296,6 @@ const struct rc_opcode_info rc_opcodes[MAX_RC_OPCODE] = {
.HasDstReg = 1,
.IsComponentwise = 1
},
{
.Opcode = RC_OPCODE_SSG,
.Name = "SSG",
.NumSrcRegs = 1,
.HasDstReg = 1,
.IsComponentwise = 1
},
{
.Opcode = RC_OPCODE_SUB,
.Name = "SUB",
@@ -155,9 +155,6 @@ typedef enum {
/** vec4 instruction: dst.c = (src0.c != src1.c) ? 1.0 : 0.0 */
RC_OPCODE_SNE,
/** vec4 instruction: dst.c = (src0.c < 0 ?) -1 : ((src0.c > 0) : 1 : 0) */
RC_OPCODE_SSG,
/** vec4 instruction: dst.c = src0.c - src1.c */
RC_OPCODE_SUB,
@@ -525,44 +525,6 @@ static void transform_SNE(struct radeon_compiler* c,
rc_remove_instruction(inst);
}
static void transform_SSG(struct radeon_compiler* c,
struct rc_instruction* inst)
{
/* result = sign(x)
*
* CMP tmp0, -x, 1, 0
* CMP tmp1, x, 1, 0
* ADD result, tmp0, -tmp1;
*/
struct rc_dst_register dst0;
unsigned tmp1;
/* 0 < x */
dst0 = new_dst_reg(c, inst);
emit3(c, inst->Prev, RC_OPCODE_CMP, NULL,
dst0,
negate(inst->U.I.SrcReg[0]),
builtin_one,
builtin_zero);
/* x < 0 */
tmp1 = rc_find_free_temporary(c);
emit3(c, inst->Prev, RC_OPCODE_CMP, NULL,
dstregtmpmask(tmp1, inst->U.I.DstReg.WriteMask),
inst->U.I.SrcReg[0],
builtin_one,
builtin_zero);
/* Either both are zero, or one of them is one and the other is zero. */
/* result = tmp0 - tmp1 */
emit2(c, inst->Prev, RC_OPCODE_ADD, NULL,
inst->U.I.DstReg,
srcreg(RC_FILE_TEMPORARY, dst0.Index),
negate(srcreg(RC_FILE_TEMPORARY, tmp1)));
rc_remove_instruction(inst);
}
static void transform_SUB(struct radeon_compiler* c,
struct rc_instruction* inst)
{
@@ -613,7 +575,6 @@ int radeonTransformALU(
case RC_OPCODE_SLE: transform_SLE(c, inst); return 1;
case RC_OPCODE_SLT: transform_SLT(c, inst); return 1;
case RC_OPCODE_SNE: transform_SNE(c, inst); return 1;
case RC_OPCODE_SSG: transform_SSG(c, inst); return 1;
case RC_OPCODE_SUB: transform_SUB(c, inst); return 1;
case RC_OPCODE_TRUNC: transform_TRUNC(c, inst); return 1;
default:
@@ -769,42 +730,6 @@ static void transform_r300_vertex_SLE(struct radeon_compiler* c,
inst->U.I.SrcReg[1].Negate ^= RC_MASK_XYZW;
}
static void transform_r300_vertex_SSG(struct radeon_compiler* c,
struct rc_instruction* inst)
{
/* result = sign(x)
*
* SLT tmp0, 0, x;
* SLT tmp1, x, 0;
* ADD result, tmp0, -tmp1;
*/
struct rc_dst_register dst0;
unsigned tmp1;
/* 0 < x */
dst0 = new_dst_reg(c, inst);
emit2(c, inst->Prev, RC_OPCODE_SLT, NULL,
dst0,
builtin_zero,
inst->U.I.SrcReg[0]);
/* x < 0 */
tmp1 = rc_find_free_temporary(c);
emit2(c, inst->Prev, RC_OPCODE_SLT, NULL,
dstregtmpmask(tmp1, inst->U.I.DstReg.WriteMask),
inst->U.I.SrcReg[0],
builtin_zero);
/* Either both are zero, or one of them is one and the other is zero. */
/* result = tmp0 - tmp1 */
emit2(c, inst->Prev, RC_OPCODE_ADD, NULL,
inst->U.I.DstReg,
srcreg(RC_FILE_TEMPORARY, dst0.Index),
negate(srcreg(RC_FILE_TEMPORARY, tmp1)));
rc_remove_instruction(inst);
}
static void transform_vertex_TRUNC(struct radeon_compiler* c,
struct rc_instruction* inst)
{
@@ -847,7 +772,6 @@ int r300_transform_vertex_alu(
return 1;
}
return 0;
case RC_OPCODE_SSG: transform_r300_vertex_SSG(c, inst); return 1;
case RC_OPCODE_SUB: transform_SUB(c, inst); return 1;
case RC_OPCODE_TRUNC: transform_vertex_TRUNC(c, inst); return 1;
default:
@@ -82,7 +82,6 @@ static unsigned translate_opcode(unsigned opcode)
case TGSI_OPCODE_ARR: return RC_OPCODE_ARR;
/* case TGSI_OPCODE_CAL: return RC_OPCODE_CAL; */
/* case TGSI_OPCODE_RET: return RC_OPCODE_RET; */
case TGSI_OPCODE_SSG: return RC_OPCODE_SSG;
case TGSI_OPCODE_CMP: return RC_OPCODE_CMP;
case TGSI_OPCODE_TXB: return RC_OPCODE_TXB;
/* case TGSI_OPCODE_DIV: return RC_OPCODE_DIV; */