iris: Don't memset the extra_aux memory range
The extra_aux memory range holds the CCS portion of surfaces using MCS_CCS or HiZ+CCS on integrated gfx12.x. Avoid memsetting because: * There's no known CCS initialization requirement for MCS_CCS. * ACM has the same documented initialization requirements for HIZ+CCS on TGL/MTL, but iris doesn't initialize the CCS portion on discrete. For TGL+, anv does not initialize the CCS portion of HiZ+CCS. Let's be consistent with these other cases and avoid initialization. If we end up needing to initialize the CCS, we can try come up with something that will work for both integrated and discrete gfx12. Reviewed-by: Rohan Garg <rohan.garg@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27835>
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@@ -999,30 +999,16 @@ static bool
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iris_resource_init_aux_buf(struct iris_screen *screen,
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struct iris_resource *res)
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{
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void *map = NULL;
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if (iris_resource_get_aux_state(res, 0, 0) != ISL_AUX_STATE_AUX_INVALID &&
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res->aux.surf.size_B > 0) {
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if (!map)
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map = iris_bo_map(NULL, res->bo, MAP_WRITE | MAP_RAW);
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void* map = iris_bo_map(NULL, res->bo, MAP_WRITE | MAP_RAW);
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if (!map)
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return false;
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memset((char*)map + res->aux.offset, 0, res->aux.surf.size_B);
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}
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if (res->aux.extra_aux.surf.size_B > 0) {
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if (!map)
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map = iris_bo_map(NULL, res->bo, MAP_WRITE | MAP_RAW);
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if (!map)
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return false;
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memset((char*)map + res->aux.extra_aux.offset,
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0, res->aux.extra_aux.surf.size_B);
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}
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if (map)
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iris_bo_unmap(res->bo);
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}
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if (res->aux.surf.size_B > 0) {
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res->aux.bo = res->bo;
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