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agx: Fix packing for iadd with shift

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Wrong bit pattern was packed, oops.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22891>
This commit is contained in:
Alyssa Rosenzweig
2023-04-25 13:51:46 -04:00
parent cd7e016961
commit e13f9caa25
1 changed files with 2 additions and 1 deletions
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src/asahi/compiler/agx_pack.c
+2 -1
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@@ -415,8 +415,9 @@ agx_pack_alu(struct util_dynarray *emission, agx_instr *I)
raw |= (I->truth_table & 0x3) << 26;
raw |= (uint64_t)(I->truth_table >> 2) << 38;
} else if (info.immediates & AGX_IMMEDIATE_SHIFT) {
assert(I->shift <= 4);
raw |= (uint64_t)(I->shift & 1) << 39;
raw |= (uint64_t)(I->shift >> 2) << 52;
raw |= (uint64_t)(I->shift >> 1) << 52;
} else if (info.immediates & AGX_IMMEDIATE_BFI_MASK) {
raw |= (uint64_t)(I->bfi_mask & 0x3) << 38;
raw |= (uint64_t)((I->bfi_mask >> 2) & 0x3) << 50;