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st/dri: Completely remove mesa_format from config setup

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We don't need to have mesa_format here at all, we can just work entirely
on pipe_format.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27709>
This commit is contained in:
Daniel Stone
2023-07-28 08:30:23 +01:00
committed by Marge Bot
parent 4515bcf5af
commit e018c91384
1 changed files with 53 additions and 62 deletions
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115
src/gallium/frontends/dri/dri_screen.c
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@@ -281,50 +281,40 @@ driConcatConfigs(__DRIconfig **a, __DRIconfig **b)
static const __DRIconfig **
dri_fill_in_modes(struct dri_screen *screen)
{
static const mesa_format mesa_formats[] = {
MESA_FORMAT_B10G10R10A2_UNORM,
MESA_FORMAT_B10G10R10X2_UNORM,
MESA_FORMAT_R10G10B10A2_UNORM,
MESA_FORMAT_R10G10B10X2_UNORM,
MESA_FORMAT_B8G8R8A8_UNORM,
MESA_FORMAT_B8G8R8X8_UNORM,
MESA_FORMAT_B8G8R8A8_SRGB,
MESA_FORMAT_B8G8R8X8_SRGB,
MESA_FORMAT_B5G6R5_UNORM,
MESA_FORMAT_RGBA_FLOAT16,
MESA_FORMAT_RGBX_FLOAT16,
/* The 32-bit RGBA format must not precede the 32-bit BGRA format.
* Likewise for RGBX and BGRX. Otherwise, the GLX client and the GLX
* server may disagree on which format the GLXFBConfig represents,
* resulting in swapped color channels.
*
* The problem, as of 2017-05-30:
* When matching a GLXFBConfig to a __DRIconfig, GLX ignores the channel
* order and chooses the first __DRIconfig with the expected channel
* sizes. Specifically, GLX compares the GLXFBConfig's and __DRIconfig's
* __DRI_ATTRIB_{CHANNEL}_SIZE but ignores __DRI_ATTRIB_{CHANNEL}_MASK.
*
* EGL does not suffer from this problem. It correctly compares the
* channel masks when matching EGLConfig to __DRIconfig.
*/
/* Required by Android, for HAL_PIXEL_FORMAT_RGBA_8888. */
MESA_FORMAT_R8G8B8A8_UNORM,
/* Required by Android, for HAL_PIXEL_FORMAT_RGBX_8888. */
MESA_FORMAT_R8G8B8X8_UNORM,
/* Required by Android, for HAL_PIXEL_FORMAT_RGBA_8888. */
MESA_FORMAT_R8G8B8A8_SRGB,
/* Required by Android, for HAL_PIXEL_FORMAT_RGBX_8888. */
MESA_FORMAT_R8G8B8X8_SRGB,
MESA_FORMAT_B5G5R5A1_UNORM,
MESA_FORMAT_R5G5B5A1_UNORM,
MESA_FORMAT_B4G4R4A4_UNORM,
MESA_FORMAT_R4G4B4A4_UNORM,
/* The 32-bit RGBA format must not precede the 32-bit BGRA format.
* Likewise for RGBX and BGRX. Otherwise, the GLX client and the GLX
* server may disagree on which format the GLXFBConfig represents,
* resulting in swapped color channels.
*
* The problem, as of 2017-05-30:
* When matching a GLXFBConfig to a __DRIconfig, GLX ignores the channel
* order and chooses the first __DRIconfig with the expected channel
* sizes. Specifically, GLX compares the GLXFBConfig's and __DRIconfig's
* __DRI_ATTRIB_{CHANNEL}_SIZE but ignores __DRI_ATTRIB_{CHANNEL}_MASK.
*
* EGL does not suffer from this problem. It correctly compares the
* channel masks when matching EGLConfig to __DRIconfig.
*/
static const enum pipe_format pipe_formats[] = {
PIPE_FORMAT_B10G10R10A2_UNORM,
PIPE_FORMAT_B10G10R10X2_UNORM,
PIPE_FORMAT_R10G10B10A2_UNORM,
PIPE_FORMAT_R10G10B10X2_UNORM,
PIPE_FORMAT_BGRA8888_UNORM,
PIPE_FORMAT_BGRX8888_UNORM,
PIPE_FORMAT_BGRA8888_SRGB,
PIPE_FORMAT_BGRX8888_SRGB,
PIPE_FORMAT_B5G6R5_UNORM,
PIPE_FORMAT_R16G16B16A16_FLOAT,
PIPE_FORMAT_R16G16B16X16_FLOAT,
PIPE_FORMAT_RGBA8888_UNORM,
PIPE_FORMAT_RGBX8888_UNORM,
PIPE_FORMAT_RGBA8888_SRGB,
PIPE_FORMAT_RGBX8888_SRGB,
PIPE_FORMAT_B5G5R5A1_UNORM,
PIPE_FORMAT_R5G5B5A1_UNORM,
PIPE_FORMAT_B4G4R4A4_UNORM,
PIPE_FORMAT_R4G4B4A4_UNORM,
};
__DRIconfig **configs = NULL;
uint8_t depth_bits_array[5];
@@ -396,35 +386,36 @@ dri_fill_in_modes(struct dri_screen *screen)
p_screen->get_param(p_screen, PIPE_CAP_MIXED_COLOR_DEPTH_BITS);
/* Add configs. */
for (unsigned f = 0; f < ARRAY_SIZE(mesa_formats); f++) {
mesa_format format = mesa_formats[f];
for (unsigned f = 0; f < ARRAY_SIZE(pipe_formats); f++) {
__DRIconfig **new_configs = NULL;
unsigned num_msaa_modes = 0; /* includes a single-sample mode */
uint8_t msaa_modes[MSAA_VISUAL_MAX_SAMPLES];
/* Expose only BGRA ordering if the loader doesn't support RGBA ordering. */
if (!allow_rgba_ordering &&
(format == MESA_FORMAT_R8G8B8A8_UNORM ||
format == MESA_FORMAT_R8G8B8X8_UNORM ||
format == MESA_FORMAT_R8G8B8A8_SRGB ||
format == MESA_FORMAT_R8G8B8X8_SRGB ||
format == MESA_FORMAT_R5G5B5A1_UNORM ||
format == MESA_FORMAT_R4G4B4A4_UNORM))
(pipe_formats[f] == PIPE_FORMAT_RGBA8888_UNORM ||
pipe_formats[f] == PIPE_FORMAT_RGBX8888_UNORM ||
pipe_formats[f] == PIPE_FORMAT_RGBA8888_SRGB ||
pipe_formats[f] == PIPE_FORMAT_RGBX8888_SRGB ||
pipe_formats[f] == PIPE_FORMAT_R5G5B5A1_UNORM ||
pipe_formats[f] == PIPE_FORMAT_R5G5B5X1_UNORM ||
pipe_formats[f] == PIPE_FORMAT_R4G4B4A4_UNORM ||
pipe_formats[f] == PIPE_FORMAT_R4G4B4X4_UNORM))
continue;
if (!allow_rgb10 &&
(format == MESA_FORMAT_B10G10R10A2_UNORM ||
format == MESA_FORMAT_B10G10R10X2_UNORM ||
format == MESA_FORMAT_R10G10B10A2_UNORM ||
format == MESA_FORMAT_R10G10B10X2_UNORM))
(pipe_formats[f] == PIPE_FORMAT_B10G10R10A2_UNORM ||
pipe_formats[f] == PIPE_FORMAT_B10G10R10X2_UNORM ||
pipe_formats[f] == PIPE_FORMAT_R10G10B10A2_UNORM ||
pipe_formats[f] == PIPE_FORMAT_R10G10B10X2_UNORM))
continue;
if (!allow_fp16 &&
(format == MESA_FORMAT_RGBA_FLOAT16 ||
format == MESA_FORMAT_RGBX_FLOAT16))
(pipe_formats[f] == PIPE_FORMAT_R16G16B16A16_FLOAT ||
pipe_formats[f] == PIPE_FORMAT_R16G16B16X16_FLOAT))
continue;
if (!p_screen->is_format_supported(p_screen, format,
if (!p_screen->is_format_supported(p_screen, pipe_formats[f],
PIPE_TEXTURE_2D, 0, 0,
PIPE_BIND_RENDER_TARGET |
PIPE_BIND_DISPLAY_TARGET))
@@ -433,7 +424,7 @@ dri_fill_in_modes(struct dri_screen *screen)
for (i = 1; i <= MSAA_VISUAL_MAX_SAMPLES; i++) {
int samples = i > 1 ? i : 0;
if (p_screen->is_format_supported(p_screen, format,
if (p_screen->is_format_supported(p_screen, pipe_formats[f],
PIPE_TEXTURE_2D, samples, samples,
PIPE_BIND_RENDER_TARGET)) {
msaa_modes[num_msaa_modes++] = samples;
@@ -442,7 +433,7 @@ dri_fill_in_modes(struct dri_screen *screen)
if (num_msaa_modes) {
/* Single-sample configs with an accumulation buffer. */
new_configs = driCreateConfigs(format,
new_configs = driCreateConfigs(pipe_formats[f],
depth_bits_array, stencil_bits_array,
depth_buffer_factor,
db_modes, ARRAY_SIZE(db_modes),
@@ -452,7 +443,7 @@ dri_fill_in_modes(struct dri_screen *screen)
/* Multi-sample configs without an accumulation buffer. */
if (num_msaa_modes > 1) {
new_configs = driCreateConfigs(format,
new_configs = driCreateConfigs(pipe_formats[f],
depth_bits_array, stencil_bits_array,
depth_buffer_factor,
db_modes, ARRAY_SIZE(db_modes),