radv: do not load/store the clear value for comp-to-single images
Images that are fast cleared with the comp-to-single mode clears DCC to 0x10 which tells the hardware to get the clear value from the main surface instead of the reg. Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12565>
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@@ -2280,6 +2280,12 @@ radv_update_color_clear_metadata(struct radv_cmd_buffer *cmd_buffer,
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assert(radv_image_has_cmask(image) || radv_dcc_enabled(image, iview->base_mip));
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/* Do not need to update the clear value for images that are fast cleared with the comp-to-single
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* mode because the hardware gets the value from the image directly.
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*/
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if (iview->image->support_comp_to_single)
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return;
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radv_set_color_clear_metadata(cmd_buffer, image, &range, color_values);
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radv_update_bound_fast_clear_color(cmd_buffer, image, cb_idx, color_values);
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@@ -2298,6 +2304,9 @@ radv_load_color_clear_metadata(struct radv_cmd_buffer *cmd_buffer, struct radv_i
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if (!radv_image_has_cmask(image) && !radv_dcc_enabled(image, iview->base_mip))
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return;
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if (iview->image->support_comp_to_single)
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return;
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if (!radv_image_has_clear_value(image)) {
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uint32_t color_values[2] = {0, 0};
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radv_update_bound_fast_clear_color(cmd_buffer, image, cb_idx, color_values);
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