i965/vec4: fix scratch reads for 64bit data
v2: Setup for a 64-bit scratch read by checking the type size of the
correct register
v3: Use byte_offset() instead of offset()
Reviewed-by: Matt Turner <mattst88@gmail.com>
This commit is contained in:
committed by
Samuel Iglesias Gonsálvez
parent
e4d9ab609f
commit
dcc36f8b29
@@ -1482,7 +1482,18 @@ vec4_visitor::emit_scratch_read(bblock_t *block, vec4_instruction *inst,
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src_reg index = get_scratch_offset(block, inst, orig_src.reladdr,
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reg_offset);
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emit_before(block, inst, SCRATCH_READ(temp, index));
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if (type_sz(orig_src.type) < 8) {
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emit_before(block, inst, SCRATCH_READ(temp, index));
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} else {
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dst_reg shuffled = dst_reg(this, glsl_type::dvec4_type);
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dst_reg shuffled_float = retype(shuffled, BRW_REGISTER_TYPE_F);
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emit_before(block, inst, SCRATCH_READ(shuffled_float, index));
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index = get_scratch_offset(block, inst, orig_src.reladdr, reg_offset + 1);
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vec4_instruction *last_read =
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SCRATCH_READ(byte_offset(shuffled_float, REG_SIZE), index);
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emit_before(block, inst, last_read);
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shuffle_64bit_data(temp, src_reg(shuffled), false, block, last_read);
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}
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}
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/**
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@@ -1548,7 +1559,8 @@ vec4_visitor::emit_resolve_reladdr(int scratch_loc[], bblock_t *block,
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/* Now handle scratch access on src */
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if (src.file == VGRF && scratch_loc[src.nr] != -1) {
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dst_reg temp = dst_reg(this, glsl_type::vec4_type);
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dst_reg temp = dst_reg(this, type_sz(src.type) == 8 ?
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glsl_type::dvec4_type : glsl_type::vec4_type);
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emit_scratch_read(block, inst, temp, src, scratch_loc[src.nr]);
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src.nr = temp.nr;
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src.offset %= REG_SIZE;
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