freedreno: use util_dynarray_clear instead of util_dynarray_resize(_, 0)

This is more expressive and simplifies a subsequent change.

v2:
- fix one more call-site after rebase

Reviewed-by: Marek Olšák <marek.olsak@amd.com>

src/gallium/drivers/freedreno/a2xx/fd2_gmem.c

@@ -404,7 +404,7 @@ patch_draws(struct fd_batch *batch, enum pc_di_vis_cull_mode vismode)
 			struct fd_cs_patch *patch = fd_patch_element(&batch->draw_patches, i);
 			*patch->cs = patch->val | DRAW(0, 0, 0, vismode, 0);
 		}
-		util_dynarray_resize(&batch->draw_patches, 0);
+		util_dynarray_clear(&batch->draw_patches);
 		return;
 	}
 
@@ -472,8 +472,8 @@ fd2_emit_sysmem_prep(struct fd_batch *batch)
 			A2XX_PA_SC_WINDOW_OFFSET_Y(0));
 
 	patch_draws(batch, IGNORE_VISIBILITY);
-	util_dynarray_resize(&batch->draw_patches, 0);
-	util_dynarray_resize(&batch->shader_patches, 0);
+	util_dynarray_clear(&batch->draw_patches);
+	util_dynarray_clear(&batch->shader_patches);
 }
 
 /* before first tile */
@@ -551,7 +551,7 @@ fd2_emit_tile_init(struct fd_batch *batch)
 		patch->cs[5] = A2XX_RB_DEPTH_INFO_DEPTH_BASE(depth_base) |
 			A2XX_RB_DEPTH_INFO_DEPTH_FORMAT(1);
 	}
-	util_dynarray_resize(&batch->gmem_patches, 0);
+	util_dynarray_clear(&batch->gmem_patches);
 
 	/* set to zero, for some reason hardware doesn't like certain values */
 	OUT_PKT3(ring, CP_SET_CONSTANT, 2);
@@ -656,8 +656,8 @@ fd2_emit_tile_init(struct fd_batch *batch)
 		patch_draws(batch, IGNORE_VISIBILITY);
 	}
 
-	util_dynarray_resize(&batch->draw_patches, 0);
-	util_dynarray_resize(&batch->shader_patches, 0);
+	util_dynarray_clear(&batch->draw_patches);
+	util_dynarray_clear(&batch->shader_patches);
 }
 
 /* before mem2gmem */

src/gallium/drivers/freedreno/a3xx/fd3_gmem.c

@@ -711,7 +711,7 @@ patch_draws(struct fd_batch *batch, enum pc_di_vis_cull_mode vismode)
 		struct fd_cs_patch *patch = fd_patch_element(&batch->draw_patches, i);
 		*patch->cs = patch->val | DRAW(0, 0, 0, vismode, 0);
 	}
-	util_dynarray_resize(&batch->draw_patches, 0);
+	util_dynarray_clear(&batch->draw_patches);
 }
 
 static void
@@ -722,7 +722,7 @@ patch_rbrc(struct fd_batch *batch, uint32_t val)
 		struct fd_cs_patch *patch = fd_patch_element(&batch->rbrc_patches, i);
 		*patch->cs = patch->val | val;
 	}
-	util_dynarray_resize(&batch->rbrc_patches, 0);
+	util_dynarray_clear(&batch->rbrc_patches);
 }
 
 /* for rendering directly to system memory: */

src/gallium/drivers/freedreno/a4xx/fd4_gmem.c

@@ -517,7 +517,7 @@ patch_draws(struct fd_batch *batch, enum pc_di_vis_cull_mode vismode)
 		struct fd_cs_patch *patch = fd_patch_element(&batch->draw_patches, i);
 		*patch->cs = patch->val | DRAW4(0, 0, 0, vismode);
 	}
-	util_dynarray_resize(&batch->draw_patches, 0);
+	util_dynarray_clear(&batch->draw_patches);
 }
 
 /* for rendering directly to system memory: */

src/gallium/drivers/freedreno/a5xx/fd5_gmem.c

@@ -255,7 +255,7 @@ patch_draws(struct fd_batch *batch, enum pc_di_vis_cull_mode vismode)
 		struct fd_cs_patch *patch = fd_patch_element(&batch->draw_patches, i);
 		*patch->cs = patch->val | DRAW4(0, 0, 0, vismode);
 	}
-	util_dynarray_resize(&batch->draw_patches, 0);
+	util_dynarray_clear(&batch->draw_patches);
 }
 
 static void

src/gallium/drivers/freedreno/a6xx/fd6_gmem.c

@@ -280,7 +280,7 @@ patch_fb_read(struct fd_batch *batch)
 		struct fd_cs_patch *patch = fd_patch_element(&batch->fb_read_patches, i);
 		*patch->cs = patch->val | A6XX_TEX_CONST_2_PITCH(gmem->bin_w * gmem->cbuf_cpp[0]);
 	}
-	util_dynarray_resize(&batch->fb_read_patches, 0);
+	util_dynarray_clear(&batch->fb_read_patches);
 }
 
 static void
@@ -291,7 +291,7 @@ patch_draws(struct fd_batch *batch, enum pc_di_vis_cull_mode vismode)
 		struct fd_cs_patch *patch = fd_patch_element(&batch->draw_patches, i);
 		*patch->cs = patch->val | DRAW4(0, 0, 0, vismode);
 	}
-	util_dynarray_resize(&batch->draw_patches, 0);
+	util_dynarray_clear(&batch->draw_patches);
 }
 
 static void