radv: simplify emitting VGT_ESGS_RING_ITEMSIZE for ESO

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27699>
This commit is contained in:
Samuel Pitoiset
2024-02-20 18:04:50 +01:00
committed by Marge Bot
parent 78be19fc72
commit dc42ad4c6a
2 changed files with 8 additions and 19 deletions
-19
View File
@@ -9156,25 +9156,6 @@ radv_emit_graphics_shaders(struct radv_cmd_buffer *cmd_buffer)
}
}
if (cmd_buffer->state.active_stages & VK_SHADER_STAGE_GEOMETRY_BIT) {
const struct radv_shader *gs = cmd_buffer->state.shaders[MESA_SHADER_GEOMETRY];
if (gs->info.merged_shader_compiled_separately) {
const struct radv_userdata_info *vgt_esgs_ring_itemsize = radv_get_user_sgpr(gs, AC_UD_VGT_ESGS_RING_ITEMSIZE);
uint32_t esgs_itemsize;
if (cmd_buffer->state.shaders[MESA_SHADER_TESS_EVAL]) {
esgs_itemsize = cmd_buffer->state.shaders[MESA_SHADER_TESS_EVAL]->info.esgs_itemsize;
} else {
esgs_itemsize = cmd_buffer->state.shaders[MESA_SHADER_VERTEX]->info.esgs_itemsize;
}
assert(vgt_esgs_ring_itemsize->sgpr_idx != -1 && vgt_esgs_ring_itemsize->num_sgprs == 1);
radeon_set_sh_reg(cs, gs->info.user_data_0 + vgt_esgs_ring_itemsize->sgpr_idx * 4, esgs_itemsize / 4);
}
}
/* Emit graphics states related to shaders. */
struct radv_vgt_shader_key vgt_shader_cfg_key = {
.tess = !!cmd_buffer->state.shaders[MESA_SHADER_TESS_CTRL],
+8
View File
@@ -3322,6 +3322,14 @@ radv_emit_geometry_shader(const struct radv_device *device, struct radeon_cmdbuf
}
radeon_set_context_reg(ctx_cs, R_028B38_VGT_GS_MAX_VERT_OUT, gs->info.gs.vertices_out);
if (gs->info.merged_shader_compiled_separately) {
const struct radv_userdata_info *vgt_esgs_ring_itemsize = radv_get_user_sgpr(gs, AC_UD_VGT_ESGS_RING_ITEMSIZE);
assert(vgt_esgs_ring_itemsize->sgpr_idx != -1 && vgt_esgs_ring_itemsize->num_sgprs == 1);
radeon_set_sh_reg(cs, gs->info.user_data_0 + vgt_esgs_ring_itemsize->sgpr_idx * 4, es->info.esgs_itemsize / 4);
}
}
void