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iris: move bindless surface state heap inside the surface state heap

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We're about to make scratch surface states part of the surface state
heap. Because those are required to be in the low 26bits parts surface
state heap (we're limited in bits handed in the CFE_STATE, 3DSTATE_VS,
etc... instructions), this change splits the 32bit surface state heap
as follow:

   - 8Mb of surface states for scratch
   - 1Gb - 8Mb of binding tables
   - 3Gb of surface states

That way all of the surfaces are located within a 4Gb region visible
from STATE_BASE_ADDRESS::SurfaceStateBaseAddress

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19727>
This commit is contained in:
Lionel Landwerlin
2022-11-15 14:26:38 +02:00
committed by Marge Bot
parent 64f1ae4bc5
commit daab161535
8 changed files with 31 additions and 30 deletions
Download Patch File Download Diff File Expand all files Collapse all files

25
src/gallium/drivers/iris/iris_bufmgr.c
View File

@@ -136,7 +136,7 @@ memzone_name(enum iris_memory_zone memzone)
const char *names[] = {
[IRIS_MEMZONE_SHADER] = "shader",
[IRIS_MEMZONE_BINDER] = "binder",
[IRIS_MEMZONE_BINDLESS] = "scratchsurf",
[IRIS_MEMZONE_SCRATCH] = "scratchsurf",
[IRIS_MEMZONE_SURFACE] = "surface",
[IRIS_MEMZONE_DYNAMIC] = "dynamic",
[IRIS_MEMZONE_OTHER] = "other",
@@ -354,10 +354,10 @@ enum iris_memory_zone
iris_memzone_for_address(uint64_t address)
{
STATIC_ASSERT(IRIS_MEMZONE_OTHER_START > IRIS_MEMZONE_DYNAMIC_START);
STATIC_ASSERT(IRIS_MEMZONE_DYNAMIC_START > IRIS_MEMZONE_SURFACE_START);
STATIC_ASSERT(IRIS_MEMZONE_SURFACE_START > IRIS_MEMZONE_BINDLESS_START);
STATIC_ASSERT(IRIS_MEMZONE_BINDLESS_START > IRIS_MEMZONE_BINDER_START);
STATIC_ASSERT(IRIS_MEMZONE_SURFACE_START > IRIS_MEMZONE_SCRATCH_START);
STATIC_ASSERT(IRIS_MEMZONE_SCRATCH_START == IRIS_MEMZONE_BINDER_START);
STATIC_ASSERT(IRIS_MEMZONE_BINDER_START > IRIS_MEMZONE_SHADER_START);
STATIC_ASSERT(IRIS_MEMZONE_DYNAMIC_START > IRIS_MEMZONE_SURFACE_START);
STATIC_ASSERT(IRIS_BORDER_COLOR_POOL_ADDRESS == IRIS_MEMZONE_DYNAMIC_START);
if (address >= IRIS_MEMZONE_OTHER_START)
@@ -372,12 +372,12 @@ iris_memzone_for_address(uint64_t address)
if (address >= IRIS_MEMZONE_SURFACE_START)
return IRIS_MEMZONE_SURFACE;
if (address >= IRIS_MEMZONE_BINDLESS_START)
return IRIS_MEMZONE_BINDLESS;
if (address >= IRIS_MEMZONE_BINDER_START)
if (address >= (IRIS_MEMZONE_BINDER_START + IRIS_SCRATCH_ZONE_SIZE))
return IRIS_MEMZONE_BINDER;
if (address >= IRIS_MEMZONE_SCRATCH_START)
return IRIS_MEMZONE_SCRATCH;
return IRIS_MEMZONE_SHADER;
}
@@ -2423,12 +2423,13 @@ iris_bufmgr_create(struct intel_device_info *devinfo, int fd, bool bo_reuse)
util_vma_heap_init(&bufmgr->vma_allocator[IRIS_MEMZONE_SHADER],
PAGE_SIZE, _4GB_minus_1 - PAGE_SIZE);
util_vma_heap_init(&bufmgr->vma_allocator[IRIS_MEMZONE_BINDER],
IRIS_MEMZONE_BINDER_START, IRIS_BINDER_ZONE_SIZE);
util_vma_heap_init(&bufmgr->vma_allocator[IRIS_MEMZONE_BINDLESS],
IRIS_MEMZONE_BINDLESS_START, IRIS_BINDLESS_SIZE);
IRIS_MEMZONE_BINDER_START + IRIS_SCRATCH_ZONE_SIZE,
IRIS_BINDER_ZONE_SIZE - IRIS_SCRATCH_ZONE_SIZE);
util_vma_heap_init(&bufmgr->vma_allocator[IRIS_MEMZONE_SCRATCH],
IRIS_MEMZONE_SCRATCH_START, IRIS_SCRATCH_ZONE_SIZE);
util_vma_heap_init(&bufmgr->vma_allocator[IRIS_MEMZONE_SURFACE],
IRIS_MEMZONE_SURFACE_START, _4GB_minus_1 -
IRIS_BINDER_ZONE_SIZE - IRIS_BINDLESS_SIZE);
IRIS_BINDER_ZONE_SIZE - IRIS_SCRATCH_ZONE_SIZE);
/* Wa_2209859288: the Tigerlake PRM's workarounds volume says:
*

10
src/gallium/drivers/iris/iris_bufmgr.h
View File

@@ -73,7 +73,7 @@ struct iris_syncobj;
enum iris_memory_zone {
IRIS_MEMZONE_SHADER,
IRIS_MEMZONE_BINDER,
IRIS_MEMZONE_BINDLESS,
IRIS_MEMZONE_SCRATCH,
IRIS_MEMZONE_SURFACE,
IRIS_MEMZONE_DYNAMIC,
IRIS_MEMZONE_OTHER,
@@ -84,13 +84,13 @@ enum iris_memory_zone {
/* Intentionally exclude single buffer "zones" */
#define IRIS_MEMZONE_COUNT (IRIS_MEMZONE_OTHER + 1)
#define IRIS_BINDLESS_SIZE (8 * 1024 * 1024)
#define IRIS_BINDER_ZONE_SIZE ((1ull << 30) - IRIS_BINDLESS_SIZE)
#define IRIS_SCRATCH_ZONE_SIZE (8 * 1024 * 1024)
#define IRIS_BINDER_ZONE_SIZE ((1ull << 30) - IRIS_SCRATCH_ZONE_SIZE)
#define IRIS_MEMZONE_SHADER_START (0ull * (1ull << 32))
#define IRIS_MEMZONE_BINDER_START (1ull * (1ull << 32))
#define IRIS_MEMZONE_BINDLESS_START (IRIS_MEMZONE_BINDER_START + IRIS_BINDER_ZONE_SIZE)
#define IRIS_MEMZONE_SURFACE_START (IRIS_MEMZONE_BINDLESS_START + IRIS_BINDLESS_SIZE)
#define IRIS_MEMZONE_SCRATCH_START IRIS_MEMZONE_BINDER_START
#define IRIS_MEMZONE_SURFACE_START (IRIS_MEMZONE_BINDER_START + IRIS_BINDER_ZONE_SIZE)
#define IRIS_MEMZONE_DYNAMIC_START (2ull * (1ull << 32))
#define IRIS_MEMZONE_OTHER_START (3ull * (1ull << 32))

6
src/gallium/drivers/iris/iris_context.c
View File

@@ -243,7 +243,7 @@ iris_destroy_context(struct pipe_context *ctx)
iris_destroy_ctx_measure(ice);
u_upload_destroy(ice->state.surface_uploader);
u_upload_destroy(ice->state.bindless_uploader);
u_upload_destroy(ice->state.scratch_surface_uploader);
u_upload_destroy(ice->state.dynamic_uploader);
u_upload_destroy(ice->query_buffer_uploader);
@@ -343,9 +343,9 @@ iris_create_context(struct pipe_screen *pscreen, void *priv, unsigned flags)
u_upload_create(ctx, 64 * 1024, PIPE_BIND_CUSTOM, PIPE_USAGE_IMMUTABLE,
IRIS_RESOURCE_FLAG_SURFACE_MEMZONE |
IRIS_RESOURCE_FLAG_DEVICE_MEM);
ice->state.bindless_uploader =
ice->state.scratch_surface_uploader =
u_upload_create(ctx, 64 * 1024, PIPE_BIND_CUSTOM, PIPE_USAGE_IMMUTABLE,
IRIS_RESOURCE_FLAG_BINDLESS_MEMZONE |
IRIS_RESOURCE_FLAG_SCRATCH_MEMZONE |
IRIS_RESOURCE_FLAG_DEVICE_MEM);
ice->state.dynamic_uploader =
u_upload_create(ctx, 64 * 1024, PIPE_BIND_CUSTOM, PIPE_USAGE_IMMUTABLE,

2
src/gallium/drivers/iris/iris_context.h
View File

@@ -827,7 +827,7 @@ struct iris_context {
struct iris_state_ref null_fb;
struct u_upload_mgr *surface_uploader;
struct u_upload_mgr *bindless_uploader;
struct u_upload_mgr *scratch_surface_uploader;
struct u_upload_mgr *dynamic_uploader;
struct iris_binder binder;

2
src/gallium/drivers/iris/iris_program.c
View File

@@ -2426,7 +2426,7 @@ iris_get_scratch_surf(struct iris_context *ice,
struct iris_bo *scratch_bo =
iris_get_scratch_space(ice, per_thread_scratch, MESA_SHADER_COMPUTE);
void *map = upload_state(ice->state.bindless_uploader, ref,
void *map = upload_state(ice->state.scratch_surface_uploader, ref,
screen->isl_dev.ss.size, 64);
isl_buffer_fill_state(&screen->isl_dev, map,

8
src/gallium/drivers/iris/iris_resource.c
View File

@@ -1122,9 +1122,9 @@ iris_resource_create_for_buffer(struct pipe_screen *pscreen,
} else if (templ->flags & IRIS_RESOURCE_FLAG_DYNAMIC_MEMZONE) {
memzone = IRIS_MEMZONE_DYNAMIC;
name = "dynamic state";
} else if (templ->flags & IRIS_RESOURCE_FLAG_BINDLESS_MEMZONE) {
memzone = IRIS_MEMZONE_BINDLESS;
name = "bindless surface state";
} else if (templ->flags & IRIS_RESOURCE_FLAG_SCRATCH_MEMZONE) {
memzone = IRIS_MEMZONE_SCRATCH;
name = "scratch surface state";
}
unsigned flags = iris_resource_alloc_flags(screen, templ, res->aux.usage);
@@ -1196,7 +1196,7 @@ iris_resource_create_with_modifiers(struct pipe_screen *pscreen,
assert(!(templ->flags & (IRIS_RESOURCE_FLAG_SHADER_MEMZONE |
IRIS_RESOURCE_FLAG_SURFACE_MEMZONE |
IRIS_RESOURCE_FLAG_DYNAMIC_MEMZONE |
IRIS_RESOURCE_FLAG_BINDLESS_MEMZONE)));
IRIS_RESOURCE_FLAG_SCRATCH_MEMZONE)));
/* Modifiers require the aux data to be in the same buffer as the main
* surface, but we combine them even when a modifier is not being used.

2
src/gallium/drivers/iris/iris_resource.h
View File

@@ -44,7 +44,7 @@ struct iris_format_info {
#define IRIS_RESOURCE_FLAG_SHADER_MEMZONE (PIPE_RESOURCE_FLAG_DRV_PRIV << 0)
#define IRIS_RESOURCE_FLAG_SURFACE_MEMZONE (PIPE_RESOURCE_FLAG_DRV_PRIV << 1)
#define IRIS_RESOURCE_FLAG_DYNAMIC_MEMZONE (PIPE_RESOURCE_FLAG_DRV_PRIV << 2)
#define IRIS_RESOURCE_FLAG_BINDLESS_MEMZONE (PIPE_RESOURCE_FLAG_DRV_PRIV << 3)
#define IRIS_RESOURCE_FLAG_SCRATCH_MEMZONE (PIPE_RESOURCE_FLAG_DRV_PRIV << 3)
#define IRIS_RESOURCE_FLAG_DEVICE_MEM (PIPE_RESOURCE_FLAG_DRV_PRIV << 4)
/**

6
src/gallium/drivers/iris/iris_state.c
View File

@@ -718,8 +718,8 @@ init_state_base_address(struct iris_batch *batch)
sba.DynamicStateBufferSizeModifyEnable = true;
sba.SurfaceStateBaseAddressModifyEnable = true;
#if GFX_VER >= 9
sba.BindlessSurfaceStateBaseAddress = ro_bo(NULL, IRIS_MEMZONE_BINDLESS_START);
sba.BindlessSurfaceStateSize = (IRIS_BINDLESS_SIZE >> 12) - 1;
sba.BindlessSurfaceStateBaseAddress = ro_bo(NULL, IRIS_MEMZONE_SCRATCH_START);
sba.BindlessSurfaceStateSize = (IRIS_SCRATCH_ZONE_SIZE >> 12) - 1;
sba.BindlessSurfaceStateBaseAddressModifyEnable = true;
sba.BindlessSurfaceStateMOCS = mocs;
#endif
@@ -5332,7 +5332,7 @@ pin_scratch_space(struct iris_context *ice,
false, IRIS_DOMAIN_NONE);
scratch_addr = ref->offset +
iris_resource_bo(ref->res)->address -
IRIS_MEMZONE_BINDLESS_START;
IRIS_MEMZONE_SCRATCH_START;
assert((scratch_addr & 0x3f) == 0 && scratch_addr < (1 << 26));
#else
scratch_addr = scratch_bo->address;