AlexIndustrial/mesa
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

i965: Make get_ccs_surf succeed in alloc_aux

Browse Source 
Synchronize the requirements listed in isl_surf_get_ccs_surf with
intel_miptree_supports_ccs by importing a restriction from ISL. Some
implications:
* We successfully create every aux_surf in alloc_aux
* We only return false from alloc_aux if we run out of memory

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
This commit is contained in:
Nanley Chery
2018-05-16 10:10:35 -07:00
parent 42aee8f4f6
commit da98441fef
2 changed files with 11 additions and 10 deletions
Download Patch File Download Diff File Expand all files Collapse all files
src/mesa/drivers/dri/i965/brw_blorp.c
+1 -4
View File
@@ -1209,10 +1209,7 @@ do_single_blorp_clear(struct brw_context *brw, struct gl_framebuffer *fb,
if (can_fast_clear && !irb->mt->aux_buf) {
assert(irb->mt->aux_usage == ISL_AUX_USAGE_CCS_D);
if (!intel_miptree_alloc_aux(brw, irb->mt)) {
/* There are a few reasons in addition to out-of-memory, that can
* cause intel_miptree_alloc_non_msrt_mcs to fail. Try to recover by
* falling back to non-fast clear.
*/
/* We're out of memory. Fall back to a non-fast clear. */
can_fast_clear = false;
}
}
src/mesa/drivers/dri/i965/intel_mipmap_tree.c
+10 -6
View File
@@ -204,6 +204,13 @@ intel_miptree_supports_ccs(struct brw_context *brw,
if (devinfo->gen < 8 && (mip_mapped || arrayed))
return false;
/* The PRM doesn't say this explicitly, but fast-clears don't appear to
* work for 3D textures until gen9 where the layout of 3D textures changes
* to match 2D array textures.
*/
if (devinfo->gen <= 8 && mt->surf.dim != ISL_SURF_DIM_2D)
return false;
/* There's no point in using an MCS buffer if the surface isn't in a
* renderable format.
*/
@@ -1793,7 +1800,7 @@ intel_miptree_alloc_aux(struct brw_context *brw,
enum isl_aux_state initial_state;
uint8_t memset_value;
struct isl_surf aux_surf;
bool aux_surf_ok;
MAYBE_UNUSED bool aux_surf_ok;
switch (mt->aux_usage) {
case ISL_AUX_USAGE_NONE:
@@ -1805,7 +1812,6 @@ intel_miptree_alloc_aux(struct brw_context *brw,
initial_state = ISL_AUX_STATE_AUX_INVALID;
aux_surf_ok = isl_surf_get_hiz_surf(&brw->isl_dev, &mt->surf, &aux_surf);
assert(aux_surf_ok);
break;
case ISL_AUX_USAGE_MCS:
assert(_mesa_is_format_color_format(mt->format));
@@ -1826,7 +1832,6 @@ intel_miptree_alloc_aux(struct brw_context *brw,
initial_state = ISL_AUX_STATE_CLEAR;
memset_value = 0xFF;
aux_surf_ok = isl_surf_get_mcs_surf(&brw->isl_dev, &mt->surf, &aux_surf);
assert(aux_surf_ok);
break;
case ISL_AUX_USAGE_CCS_D:
case ISL_AUX_USAGE_CCS_E:
@@ -1852,9 +1857,8 @@ intel_miptree_alloc_aux(struct brw_context *brw,
break;
}
/* Ensure we have a valid aux_surf. */
if (aux_surf_ok == false)
return false;
/* We should have a valid aux_surf. */
assert(aux_surf_ok);
/* No work is needed for a zero-sized auxiliary buffer. */
if (aux_surf.size == 0)