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etnaviv: isa: Add txf instruction

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This instruction is used to implement texelfetch.

Blob generates such txf's for
dEQP-GLES3.functional.shaders.texture_functions.texelfetch.+

Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34685>
This commit is contained in:
Christian Gmeiner
2025-04-18 23:35:20 +02:00
parent 6325868bbe
commit da90fca609
2 changed files with 6 additions and 0 deletions
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src/etnaviv/isa/etnaviv.xml
+5
View File
@@ -1359,6 +1359,11 @@ SPDX-License-Identifier: MIT
<pattern pos="80">1</pattern> <!-- OPCODE_BIT6 -->
</bitset>
<bitset name="txf" extends="#instruction-tex-src0-src1-src2">
<pattern low="0" high="5">001001</pattern> <!-- OPC -->
<pattern pos="80">1</pattern> <!-- OPCODE_BIT6 -->
</bitset>
<bitset name="imadlo0" extends="#instruction-alu-src0-src1-src2">
<pattern low="0" high="5">001100</pattern> <!-- OPC -->
<pattern pos="80">1</pattern> <!-- OPCODE_BIT6 -->
src/etnaviv/isa/tests/disasm.cpp
+1
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@@ -166,6 +166,7 @@ INSTANTIATE_TEST_SUITE_P(Opcodes, DisasmTest,
disasm_state{ {0x00801036, 0x15400804, 0x01540050, 0x00000002}, "clamp0_max t0.x___, u0.yyyy, u0.zzzz, void\n"},
disasm_state{ {0x0080103b, 0x00001804, 0x40000000, 0x00400028}, "iaddsat.s32 t0.x___, t1.xxxx, void, -t2.xxxx\n"},
disasm_state{ {0x01001008, 0x15400804, 0xd00100c0, 0x00000007}, "imod.u16 t0._y__, t0.yyyy, 1, void\n"},
disasm_state{ {0x07811009, 0x15001f20, 0x01ff00c0, 0x78021008}, "txf t1, tex0.xyzw, t1.xyyy, t1.wwww, 4352\n", FLAG_FAILING_ASM},
disasm_state{ {0x0080103c, 0x00001804, 0x40000140, 0x00000000}, "imullo0.s32 t0.x___, t1.xxxx, t2.xxxx, void\n"},
disasm_state{ {0x00801000, 0x00001804, 0x40010140, 0x00000000}, "imulhi0.s32 t0.x___, t1.xxxx, t2.xxxx, void\n"},
disasm_state{ {0x00801004, 0x00201804, 0x40010040, 0x00000000}, "idiv0.s16 t0.x___, t1.xxxx, t0.xxxx, void\n"},