intel/brw: Combine constants for src0 of POW instructions too

I tried this when I was working on MR !7698, and it didn't have much
affect back then. Maybe I've added more stuff to my fossil-db?

Gfx12 platforms (Tiger Lake and DG2) are unaffected because the POW
instruction was removed.

shader-db:

Ice Lake and Skylake had similar results. (Ice Lake shown)
total instructions in shared programs: 20301933 -> 20301900 (<.01%)
instructions in affected programs: 9077 -> 9044 (-0.36%)
helped: 33 / HURT: 0

total cycles in shared programs: 842797624 -> 842799471 (<.01%)
cycles in affected programs: 1361911 -> 1363758 (0.14%)
helped: 35 / HURT: 111

LOST:   0
GAINED: 9

fossil-db:

Ice Lake and Skylake had similar results. (Ice Lake shown)
Totals:
Instrs: 165510222 -> 165510163 (-0.00%)
Cycles: 15125195835 -> 15125194484 (-0.00%); split: -0.00%, +0.00%
Spill count: 45204 -> 45196 (-0.02%)
Fill count: 74157 -> 74149 (-0.01%)

Totals from 65 (0.01% of 656118) affected shaders:
Instrs: 57426 -> 57367 (-0.10%)
Cycles: 1667918 -> 1666567 (-0.08%); split: -0.11%, +0.03%
Spill count: 137 -> 129 (-5.84%)
Fill count: 515 -> 507 (-1.55%)

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27552>
This commit is contained in:
Ian Romanick
2020-08-04 17:34:21 -07:00
committed by Marge Bot
parent e7480f94c1
commit d9674cbe7d
2 changed files with 1 additions and 9 deletions
@@ -1317,8 +1317,6 @@ brw_fs_opt_combine_constants(fs_visitor &s)
case SHADER_OPCODE_INT_REMAINDER:
case SHADER_OPCODE_POW:
if (inst->src[0].file == IMM) {
assert(inst->opcode != SHADER_OPCODE_POW);
add_candidate_immediate(&table, inst, ip, 0, true, false, block,
devinfo, const_ctx);
}
@@ -988,18 +988,12 @@ try_constant_propagate(const brw_compiler *compiler, fs_inst *inst,
switch (inst->opcode) {
case BRW_OPCODE_MOV:
case SHADER_OPCODE_LOAD_PAYLOAD:
case SHADER_OPCODE_POW:
case FS_OPCODE_PACK:
inst->src[arg] = val;
progress = true;
break;
case SHADER_OPCODE_POW:
if (arg == 1) {
inst->src[arg] = val;
progress = true;
}
break;
case BRW_OPCODE_SUBB:
if (arg == 1) {
inst->src[arg] = val;