intel/brw: Combine constants for src0 of POW instructions too
I tried this when I was working on MR !7698, and it didn't have much affect back then. Maybe I've added more stuff to my fossil-db? Gfx12 platforms (Tiger Lake and DG2) are unaffected because the POW instruction was removed. shader-db: Ice Lake and Skylake had similar results. (Ice Lake shown) total instructions in shared programs: 20301933 -> 20301900 (<.01%) instructions in affected programs: 9077 -> 9044 (-0.36%) helped: 33 / HURT: 0 total cycles in shared programs: 842797624 -> 842799471 (<.01%) cycles in affected programs: 1361911 -> 1363758 (0.14%) helped: 35 / HURT: 111 LOST: 0 GAINED: 9 fossil-db: Ice Lake and Skylake had similar results. (Ice Lake shown) Totals: Instrs: 165510222 -> 165510163 (-0.00%) Cycles: 15125195835 -> 15125194484 (-0.00%); split: -0.00%, +0.00% Spill count: 45204 -> 45196 (-0.02%) Fill count: 74157 -> 74149 (-0.01%) Totals from 65 (0.01% of 656118) affected shaders: Instrs: 57426 -> 57367 (-0.10%) Cycles: 1667918 -> 1666567 (-0.08%); split: -0.11%, +0.03% Spill count: 137 -> 129 (-5.84%) Fill count: 515 -> 507 (-1.55%) Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27552>
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@@ -1317,8 +1317,6 @@ brw_fs_opt_combine_constants(fs_visitor &s)
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case SHADER_OPCODE_INT_REMAINDER:
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case SHADER_OPCODE_POW:
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if (inst->src[0].file == IMM) {
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assert(inst->opcode != SHADER_OPCODE_POW);
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add_candidate_immediate(&table, inst, ip, 0, true, false, block,
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devinfo, const_ctx);
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}
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@@ -988,18 +988,12 @@ try_constant_propagate(const brw_compiler *compiler, fs_inst *inst,
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switch (inst->opcode) {
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case BRW_OPCODE_MOV:
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case SHADER_OPCODE_LOAD_PAYLOAD:
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case SHADER_OPCODE_POW:
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case FS_OPCODE_PACK:
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inst->src[arg] = val;
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progress = true;
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break;
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case SHADER_OPCODE_POW:
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if (arg == 1) {
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inst->src[arg] = val;
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progress = true;
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}
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break;
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case BRW_OPCODE_SUBB:
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if (arg == 1) {
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inst->src[arg] = val;
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