freedreno/drm: Import new UABI for VM_BIND
Imported from kernel commit 203dcde88156
("Merge tag 'drm-msm-next-2025-07-05' of https://gitlab.freedesktop.org/drm/msm into drm-next").
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32533>
This commit is contained in:
@@ -91,6 +91,32 @@ struct drm_msm_timespec {
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#define MSM_PARAM_UBWC_SWIZZLE 0x12 /* RO */
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#define MSM_PARAM_MACROTILE_MODE 0x13 /* RO */
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#define MSM_PARAM_UCHE_TRAP_BASE 0x14 /* RO */
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/* PRR (Partially Resident Region) is required for sparse residency: */
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#define MSM_PARAM_HAS_PRR 0x15 /* RO */
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/* MSM_PARAM_EN_VM_BIND is set to 1 to enable VM_BIND ops.
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*
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* With VM_BIND enabled, userspace is required to allocate iova and use the
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* VM_BIND ops for map/unmap ioctls. MSM_INFO_SET_IOVA and MSM_INFO_GET_IOVA
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* will be rejected. (The latter does not have a sensible meaning when a BO
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* can have multiple and/or partial mappings.)
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*
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* With VM_BIND enabled, userspace does not include a submit_bo table in the
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* SUBMIT ioctl (this will be rejected), the resident set is determined by
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* the the VM_BIND ops.
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*
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* Enabling VM_BIND will fail on devices which do not have per-process pgtables.
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* And it is not allowed to disable VM_BIND once it has been enabled.
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*
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* Enabling VM_BIND should be done (attempted) prior to allocating any BOs or
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* submitqueues of type MSM_SUBMITQUEUE_VM_BIND.
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*
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* Relatedly, when VM_BIND mode is enabled, the kernel will not try to recover
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* from GPU faults or failed async VM_BIND ops, in particular because it is
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* difficult to communicate to userspace which op failed so that userspace
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* could rewind and try again. When the VM is marked unusable, the SUBMIT
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* ioctl will throw -EPIPE.
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*/
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#define MSM_PARAM_EN_VM_BIND 0x16 /* WO, once */
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/* For backwards compat. The original support for preemption was based on
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* a single ring per priority level so # of priority levels equals the #
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@@ -114,6 +140,19 @@ struct drm_msm_param {
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#define MSM_BO_SCANOUT 0x00000001 /* scanout capable */
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#define MSM_BO_GPU_READONLY 0x00000002
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/* Private buffers do not need to be explicitly listed in the SUBMIT
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* ioctl, unless referenced by a drm_msm_gem_submit_cmd. Private
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* buffers may NOT be imported/exported or used for scanout (or any
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* other situation where buffers can be indefinitely pinned, but
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* cases other than scanout are all kernel owned BOs which are not
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* visible to userspace).
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*
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* In exchange for those constraints, all private BOs associated with
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* a single context (drm_file) share a single dma_resv, and if there
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* has been no eviction since the last submit, there are no per-BO
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* bookeeping to do, significantly cutting the SUBMIT overhead.
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*/
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#define MSM_BO_NO_SHARE 0x00000004
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#define MSM_BO_CACHE_MASK 0x000f0000
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/* cache modes */
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#define MSM_BO_CACHED 0x00010000
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@@ -123,6 +162,7 @@ struct drm_msm_param {
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#define MSM_BO_FLAGS (MSM_BO_SCANOUT | \
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MSM_BO_GPU_READONLY | \
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MSM_BO_NO_SHARE | \
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MSM_BO_CACHE_MASK)
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struct drm_msm_gem_new {
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@@ -180,6 +220,17 @@ struct drm_msm_gem_cpu_fini {
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* Cmdstream Submission:
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*/
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#define MSM_SYNCOBJ_RESET 0x00000001 /* Reset syncobj after wait. */
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#define MSM_SYNCOBJ_FLAGS ( \
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MSM_SYNCOBJ_RESET | \
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0)
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struct drm_msm_syncobj {
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__u32 handle; /* in, syncobj handle. */
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__u32 flags; /* in, from MSM_SUBMIT_SYNCOBJ_FLAGS */
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__u64 point; /* in, timepoint for timeline syncobjs. */
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};
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/* The value written into the cmdstream is logically:
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*
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* ((relocbuf->gpuaddr + reloc_offset) << shift) | or
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@@ -221,7 +272,10 @@ struct drm_msm_gem_submit_cmd {
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__u32 size; /* in, cmdstream size */
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__u32 pad;
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__u32 nr_relocs; /* in, number of submit_reloc's */
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__u64 relocs; /* in, ptr to array of submit_reloc's */
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union {
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__u64 relocs; /* in, ptr to array of submit_reloc's */
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__u64 iova; /* cmdstream address (for VM_BIND contexts) */
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};
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};
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/* Each buffer referenced elsewhere in the cmdstream submit (ie. the
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@@ -269,17 +323,6 @@ struct drm_msm_gem_submit_bo {
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MSM_SUBMIT_FENCE_SN_IN | \
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0)
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#define MSM_SUBMIT_SYNCOBJ_RESET 0x00000001 /* Reset syncobj after wait. */
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#define MSM_SUBMIT_SYNCOBJ_FLAGS ( \
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MSM_SUBMIT_SYNCOBJ_RESET | \
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0)
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struct drm_msm_gem_submit_syncobj {
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__u32 handle; /* in, syncobj handle. */
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__u32 flags; /* in, from MSM_SUBMIT_SYNCOBJ_FLAGS */
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__u64 point; /* in, timepoint for timeline syncobjs. */
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};
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/* Each cmdstream submit consists of a table of buffers involved, and
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* one or more cmdstream buffers. This allows for conditional execution
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* (context-restore), and IB buffers needed for per tile/bin draw cmds.
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@@ -293,13 +336,80 @@ struct drm_msm_gem_submit {
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__u64 cmds; /* in, ptr to array of submit_cmd's */
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__s32 fence_fd; /* in/out fence fd (see MSM_SUBMIT_FENCE_FD_IN/OUT) */
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__u32 queueid; /* in, submitqueue id */
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__u64 in_syncobjs; /* in, ptr to array of drm_msm_gem_submit_syncobj */
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__u64 out_syncobjs; /* in, ptr to array of drm_msm_gem_submit_syncobj */
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__u64 in_syncobjs; /* in, ptr to array of drm_msm_syncobj */
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__u64 out_syncobjs; /* in, ptr to array of drm_msm_syncobj */
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__u32 nr_in_syncobjs; /* in, number of entries in in_syncobj */
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__u32 nr_out_syncobjs; /* in, number of entries in out_syncobj. */
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__u32 syncobj_stride; /* in, stride of syncobj arrays. */
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__u32 pad; /*in, reserved for future use, always 0. */
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};
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#define MSM_VM_BIND_OP_UNMAP 0
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#define MSM_VM_BIND_OP_MAP 1
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#define MSM_VM_BIND_OP_MAP_NULL 2
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#define MSM_VM_BIND_OP_DUMP 1
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#define MSM_VM_BIND_OP_FLAGS ( \
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MSM_VM_BIND_OP_DUMP | \
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0)
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/**
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* struct drm_msm_vm_bind_op - bind/unbind op to run
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*/
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struct drm_msm_vm_bind_op {
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/** @op: one of MSM_VM_BIND_OP_x */
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__u32 op;
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/** @handle: GEM object handle, MBZ for UNMAP or MAP_NULL */
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__u32 handle;
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/** @obj_offset: Offset into GEM object, MBZ for UNMAP or MAP_NULL */
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__u64 obj_offset;
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/** @iova: Address to operate on */
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__u64 iova;
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/** @range: Number of bites to to map/unmap */
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__u64 range;
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/** @flags: Bitmask of MSM_VM_BIND_OP_FLAG_x */
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__u32 flags;
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/** @pad: MBZ */
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__u32 pad;
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};
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#define MSM_VM_BIND_FENCE_FD_IN 0x00000001
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#define MSM_VM_BIND_FENCE_FD_OUT 0x00000002
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#define MSM_VM_BIND_FLAGS ( \
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MSM_VM_BIND_FENCE_FD_IN | \
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MSM_VM_BIND_FENCE_FD_OUT | \
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0)
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/**
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* struct drm_msm_vm_bind - Input of &DRM_IOCTL_MSM_VM_BIND
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*/
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struct drm_msm_vm_bind {
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/** @flags: in, bitmask of MSM_VM_BIND_x */
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__u32 flags;
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/** @nr_ops: the number of bind ops in this ioctl */
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__u32 nr_ops;
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/** @fence_fd: in/out fence fd (see MSM_VM_BIND_FENCE_FD_IN/OUT) */
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__s32 fence_fd;
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/** @queue_id: in, submitqueue id */
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__u32 queue_id;
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/** @in_syncobjs: in, ptr to array of drm_msm_gem_syncobj */
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__u64 in_syncobjs;
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/** @out_syncobjs: in, ptr to array of drm_msm_gem_syncobj */
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__u64 out_syncobjs;
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/** @nr_in_syncobjs: in, number of entries in in_syncobj */
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__u32 nr_in_syncobjs;
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/** @nr_out_syncobjs: in, number of entries in out_syncobj */
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__u32 nr_out_syncobjs;
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/** @syncobj_stride: in, stride of syncobj arrays */
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__u32 syncobj_stride;
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/** @op_stride: sizeof each struct drm_msm_vm_bind_op in @ops */
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__u32 op_stride;
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union {
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/** @op: used if num_ops == 1 */
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struct drm_msm_vm_bind_op op;
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/** @ops: userptr to array of drm_msm_vm_bind_op if num_ops > 1 */
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__u64 ops;
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};
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};
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#define MSM_WAIT_FENCE_BOOST 0x00000001
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@@ -345,12 +455,19 @@ struct drm_msm_gem_madvise {
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/*
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* Draw queues allow the user to set specific submission parameter. Command
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* submissions specify a specific submitqueue to use. ID 0 is reserved for
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* backwards compatibility as a "default" submitqueue
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* backwards compatibility as a "default" submitqueue.
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*
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* Because VM_BIND async updates happen on the CPU, they must run on a
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* virtual queue created with the flag MSM_SUBMITQUEUE_VM_BIND. If we had
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* a way to do pgtable updates on the GPU, we could drop this restriction.
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*/
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#define MSM_SUBMITQUEUE_ALLOW_PREEMPT 0x00000001
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#define MSM_SUBMITQUEUE_VM_BIND 0x00000002 /* virtual queue for VM_BIND ops */
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#define MSM_SUBMITQUEUE_FLAGS ( \
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MSM_SUBMITQUEUE_ALLOW_PREEMPT | \
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MSM_SUBMITQUEUE_VM_BIND | \
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0)
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/*
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@@ -388,6 +505,7 @@ struct drm_msm_submitqueue_query {
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#define DRM_MSM_SUBMITQUEUE_NEW 0x0A
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#define DRM_MSM_SUBMITQUEUE_CLOSE 0x0B
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#define DRM_MSM_SUBMITQUEUE_QUERY 0x0C
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#define DRM_MSM_VM_BIND 0x0D
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#define DRM_IOCTL_MSM_GET_PARAM DRM_IOWR(DRM_COMMAND_BASE + DRM_MSM_GET_PARAM, struct drm_msm_param)
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#define DRM_IOCTL_MSM_SET_PARAM DRM_IOW (DRM_COMMAND_BASE + DRM_MSM_SET_PARAM, struct drm_msm_param)
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@@ -401,6 +519,7 @@ struct drm_msm_submitqueue_query {
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#define DRM_IOCTL_MSM_SUBMITQUEUE_NEW DRM_IOWR(DRM_COMMAND_BASE + DRM_MSM_SUBMITQUEUE_NEW, struct drm_msm_submitqueue)
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#define DRM_IOCTL_MSM_SUBMITQUEUE_CLOSE DRM_IOW (DRM_COMMAND_BASE + DRM_MSM_SUBMITQUEUE_CLOSE, __u32)
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#define DRM_IOCTL_MSM_SUBMITQUEUE_QUERY DRM_IOW (DRM_COMMAND_BASE + DRM_MSM_SUBMITQUEUE_QUERY, struct drm_msm_submitqueue_query)
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#define DRM_IOCTL_MSM_VM_BIND DRM_IOWR(DRM_COMMAND_BASE + DRM_MSM_VM_BIND, struct drm_msm_vm_bind)
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#if defined(__cplusplus)
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}
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@@ -584,7 +584,7 @@ device_submit_cmdstreams(struct device *dev)
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.out_syncobjs = 0,
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.nr_in_syncobjs = 0,
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.nr_out_syncobjs = 0,
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.syncobj_stride = sizeof(struct drm_msm_gem_submit_syncobj),
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.syncobj_stride = sizeof(struct drm_msm_syncobj),
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};
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int ret = drmCommandWriteRead(dev->fd, DRM_MSM_GEM_SUBMIT, &submit_req,
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@@ -907,7 +907,7 @@ msm_queue_submit(struct tu_queue *queue, void *_submit,
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int ret;
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struct tu_msm_queue_submit *submit =
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(struct tu_msm_queue_submit *)_submit;
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struct drm_msm_gem_submit_syncobj *in_syncobjs, *out_syncobjs;
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struct drm_msm_syncobj *in_syncobjs, *out_syncobjs;
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struct drm_msm_gem_submit req;
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uint64_t gpu_offset = 0;
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uint32_t entry_count =
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@@ -920,7 +920,7 @@ msm_queue_submit(struct tu_queue *queue, void *_submit,
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uint32_t flags = MSM_PIPE_3D0;
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/* Allocate without wait timeline semaphores */
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in_syncobjs = (struct drm_msm_gem_submit_syncobj *) vk_zalloc(
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in_syncobjs = (struct drm_msm_syncobj *) vk_zalloc(
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&queue->device->vk.alloc,
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wait_count * sizeof(*in_syncobjs), 8,
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VK_SYSTEM_ALLOCATION_SCOPE_DEVICE);
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@@ -931,7 +931,7 @@ msm_queue_submit(struct tu_queue *queue, void *_submit,
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}
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/* Allocate with signal timeline semaphores considered */
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out_syncobjs = (struct drm_msm_gem_submit_syncobj *) vk_zalloc(
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out_syncobjs = (struct drm_msm_syncobj *) vk_zalloc(
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&queue->device->vk.alloc,
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signal_count * sizeof(*out_syncobjs), 8,
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VK_SYSTEM_ALLOCATION_SCOPE_DEVICE);
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@@ -944,7 +944,7 @@ msm_queue_submit(struct tu_queue *queue, void *_submit,
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for (uint32_t i = 0; i < wait_count; i++) {
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struct vk_sync *sync = waits[i].sync;
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in_syncobjs[i] = (struct drm_msm_gem_submit_syncobj) {
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in_syncobjs[i] = (struct drm_msm_syncobj) {
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.handle = vk_sync_as_drm_syncobj(sync)->syncobj,
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.flags = 0,
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.point = waits[i].wait_value,
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@@ -954,7 +954,7 @@ msm_queue_submit(struct tu_queue *queue, void *_submit,
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for (uint32_t i = 0; i < signal_count; i++) {
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struct vk_sync *sync = signals[i].sync;
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out_syncobjs[i] = (struct drm_msm_gem_submit_syncobj) {
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out_syncobjs[i] = (struct drm_msm_syncobj) {
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.handle = vk_sync_as_drm_syncobj(sync)->syncobj,
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.flags = 0,
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.point = signals[i].signal_value,
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@@ -1013,7 +1013,7 @@ msm_queue_submit(struct tu_queue *queue, void *_submit,
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.out_syncobjs = (uint64_t)(uintptr_t)out_syncobjs,
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.nr_in_syncobjs = wait_count,
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.nr_out_syncobjs = signal_count,
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.syncobj_stride = sizeof(struct drm_msm_gem_submit_syncobj),
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.syncobj_stride = sizeof(struct drm_msm_syncobj),
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};
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{
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