radeonsi: load the streamout buf descriptors closer to their use
LLVM can still decide to hoist the loads since they're marked invariant. Reviewed-by: Marek Olšák <marek.olsak@amd.com>
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@@ -2274,19 +2274,6 @@ static void si_llvm_emit_streamout(struct si_shader_context *ctx,
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LLVMBuilderRef builder = gallivm->builder;
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int i;
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struct lp_build_if_state if_ctx;
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LLVMValueRef so_buffers[4];
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LLVMValueRef buf_ptr = LLVMGetParam(ctx->main_fn,
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SI_PARAM_RW_BUFFERS);
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/* Load the descriptors. */
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for (i = 0; i < 4; ++i) {
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if (ctx->shader->selector->so.stride[i]) {
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LLVMValueRef offset = lp_build_const_int32(gallivm,
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SI_VS_STREAMOUT_BUF0 + i);
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so_buffers[i] = build_indexed_load_const(ctx, buf_ptr, offset);
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}
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}
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/* Get bits [22:16], i.e. (so_param >> 16) & 127; */
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LLVMValueRef so_vtx_count =
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@@ -2319,12 +2306,22 @@ static void si_llvm_emit_streamout(struct si_shader_context *ctx,
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/* Compute (streamout_write_index + thread_id). */
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so_write_index = LLVMBuildAdd(builder, so_write_index, tid, "");
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/* Compute the write offset for each enabled buffer. */
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/* Load the descriptor and compute the write offset for each
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* enabled buffer. */
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LLVMValueRef so_write_offset[4] = {};
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LLVMValueRef so_buffers[4];
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LLVMValueRef buf_ptr = LLVMGetParam(ctx->main_fn,
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SI_PARAM_RW_BUFFERS);
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for (i = 0; i < 4; i++) {
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if (!so->stride[i])
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continue;
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LLVMValueRef offset = lp_build_const_int32(gallivm,
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SI_VS_STREAMOUT_BUF0 + i);
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so_buffers[i] = build_indexed_load_const(ctx, buf_ptr, offset);
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LLVMValueRef so_offset = LLVMGetParam(ctx->main_fn,
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ctx->param_streamout_offset[i]);
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so_offset = LLVMBuildMul(builder, so_offset, LLVMConstInt(ctx->i32, 4, 0), "");
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