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radeonsi: use the optimal draw packet sequence for VGT_FLUSH

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Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13048>
This commit is contained in:
Marek Olšák
2021-09-26 02:20:52 -04:00
committed by Marge Bot
parent a927a2f527
commit d7b0ddbfa8
1 changed files with 1 additions and 1 deletions
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src/gallium/drivers/radeonsi/si_state_draw.cpp
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@@ -2267,7 +2267,7 @@ static void si_draw_vbo(struct pipe_context *ctx,
/* Use optimal packet order based on whether we need to sync the pipeline. */
if (unlikely(sctx->flags & (SI_CONTEXT_FLUSH_AND_INV_CB | SI_CONTEXT_FLUSH_AND_INV_DB |
SI_CONTEXT_PS_PARTIAL_FLUSH | SI_CONTEXT_CS_PARTIAL_FLUSH |
SI_CONTEXT_VS_PARTIAL_FLUSH))) {
SI_CONTEXT_VS_PARTIAL_FLUSH | SI_CONTEXT_VGT_FLUSH))) {
/* If we have to wait for idle, set all states first, so that all
* SET packets are processed in parallel with previous draw calls.
* Then draw and prefetch at the end. This ensures that the time