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Merge branch 'softpipe_0_1_branch' of git+ssh://brianp@git.freedesktop.org/git/mesa/mesa into softpipe_0_1_branch

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This commit is contained in:
Brian
2007-08-02 09:17:56 -06:00
parent 1b0e92b91a a4a0189ed6
commit d747bf14dd
18 changed files with 125 additions and 470 deletions
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src/mesa/drivers/dri/i915pipe/intel_blit.c
+4
View File
@@ -267,6 +267,8 @@ intelEmitFillBlit(struct intel_context *intel,
DRM_BO_MASK_MEM | DRM_BO_FLAG_WRITE, dst_offset);
OUT_BATCH(value);
ADVANCE_BATCH();
intel_batchbuffer_flush(intel->batch);
}
@@ -385,6 +387,8 @@ intelEmitCopyBlit(struct intel_context *intel,
src_offset + src_y * src_pitch);
ADVANCE_BATCH();
}
intel_batchbuffer_flush( intel->batch );
}
src/mesa/drivers/dri/i915pipe/intel_buffer_objects.c
+1 -56
View File
@@ -62,39 +62,6 @@ intel_bufferobj_alloc(GLcontext * ctx, GLuint name, GLenum target)
}
/* Break the COW tie to the region. The region gets to keep the data.
*/
void
intel_bufferobj_release_region(struct intel_context *intel,
struct intel_buffer_object *intel_obj)
{
assert(intel_obj->region->buffer == intel_obj->buffer);
intel_obj->region->pbo = NULL;
intel_obj->region = NULL;
driBOUnReference(intel_obj->buffer);
intel_obj->buffer = NULL;
/* This leads to a large number of buffer deletion/creation events.
* Currently the drm doesn't like that:
*/
driGenBuffers(intel->intelScreen->regionPool,
"buffer object", 1, &intel_obj->buffer, 64, 0, 0);
LOCK_HARDWARE(intel);
driBOData(intel_obj->buffer, intel_obj->Base.Size, NULL, 0);
UNLOCK_HARDWARE(intel);
}
/* Break the COW tie to the region. Both the pbo and the region end
* up with a copy of the data.
*/
void
intel_bufferobj_cow(struct intel_context *intel,
struct intel_buffer_object *intel_obj)
{
assert(intel_obj->region);
intel->pipe->region_cow(intel->pipe, intel_obj->region);
}
/**
* Deallocate/free a vertex/pixel buffer object.
@@ -103,15 +70,11 @@ intel_bufferobj_cow(struct intel_context *intel,
static void
intel_bufferobj_free(GLcontext * ctx, struct gl_buffer_object *obj)
{
struct intel_context *intel = intel_context(ctx);
struct intel_buffer_object *intel_obj = intel_buffer_object(obj);
assert(intel_obj);
if (intel_obj->region) {
intel_bufferobj_release_region(intel, intel_obj);
}
else if (intel_obj->buffer) {
if (intel_obj->buffer) {
driDeleteBuffers(1, &intel_obj->buffer);
}
@@ -139,9 +102,6 @@ intel_bufferobj_data(GLcontext * ctx,
intel_obj->Base.Size = size;
intel_obj->Base.Usage = usage;
if (intel_obj->region)
intel_bufferobj_release_region(intel, intel_obj);
LOCK_HARDWARE(intel);
driBOData(intel_obj->buffer, size, data, 0);
UNLOCK_HARDWARE(intel);
@@ -161,14 +121,10 @@ intel_bufferobj_subdata(GLcontext * ctx,
GLsizeiptrARB size,
const GLvoid * data, struct gl_buffer_object *obj)
{
struct intel_context *intel = intel_context(ctx);
struct intel_buffer_object *intel_obj = intel_buffer_object(obj);
assert(intel_obj);
if (intel_obj->region)
intel_bufferobj_cow(intel, intel_obj);
driBOSubData(intel_obj->buffer, offset, size, data);
}
@@ -199,16 +155,12 @@ intel_bufferobj_map(GLcontext * ctx,
GLenum target,
GLenum access, struct gl_buffer_object *obj)
{
struct intel_context *intel = intel_context(ctx);
struct intel_buffer_object *intel_obj = intel_buffer_object(obj);
/* XXX: Translate access to flags arg below:
*/
assert(intel_obj);
if (intel_obj->region)
intel_bufferobj_cow(intel, intel_obj);
obj->Pointer = driBOMap(intel_obj->buffer,
DRM_BO_FLAG_READ | DRM_BO_FLAG_WRITE, 0);
return obj->Pointer;
@@ -235,13 +187,6 @@ struct _DriBufferObject *
intel_bufferobj_buffer(struct intel_context *intel,
struct intel_buffer_object *intel_obj, GLuint flag)
{
if (intel_obj->region) {
if (flag == INTEL_WRITE_PART)
intel_bufferobj_cow(intel, intel_obj);
else if (flag == INTEL_WRITE_FULL)
intel_bufferobj_release_region(intel, intel_obj);
}
return intel_obj->buffer;
}
src/mesa/drivers/dri/i915pipe/intel_buffer_objects.h
-4
View File
@@ -42,10 +42,6 @@ struct intel_buffer_object
{
struct gl_buffer_object Base;
struct _DriBufferObject *buffer; /* the low-level buffer manager's buffer handle */
struct pipe_region *region; /* Is there a zero-copy texture
associated with this (pixel)
buffer object? */
};
src/mesa/drivers/dri/i915pipe/intel_buffers.c
-131
View File
@@ -295,134 +295,6 @@ intelWindowMoved(struct intel_context *intel)
/**
* Called by ctx->Driver.Clear.
* XXX NO LONGER USED - REMOVE IN NEAR FUTURE
*/
#if 0
static void
intelClear(GLcontext *ctx, GLbitfield mask)
#else
static void
OLD_intelClear(struct pipe_context *pipe,
GLboolean color, GLboolean depth,
GLboolean stencil, GLboolean accum)
#endif
{
GLcontext *ctx = (GLcontext *) pipe->glctx;
const GLuint colorMask = *((GLuint *) & ctx->Color.ColorMask);
GLbitfield tri_mask = 0;
GLbitfield blit_mask = 0;
GLbitfield swrast_mask = 0;
struct gl_framebuffer *fb = ctx->DrawBuffer;
GLuint i;
GLbitfield mask;
if (color)
mask = ctx->DrawBuffer->_ColorDrawBufferMask[0]; /*XXX temporary*/
else
mask = 0x0;
if (0)
fprintf(stderr, "%s\n", __FUNCTION__);
/* HW color buffers (front, back, aux, generic FBO, etc) */
if (colorMask == ~0) {
/* clear all R,G,B,A */
/* XXX FBO: need to check if colorbuffers are software RBOs! */
blit_mask |= (mask & BUFFER_BITS_COLOR);
}
else {
/* glColorMask in effect */
tri_mask |= (mask & BUFFER_BITS_COLOR);
}
/* HW stencil */
if (stencil) {
const struct pipe_region *stencilRegion
= intel_get_rb_region(fb, BUFFER_STENCIL);
if (stencilRegion) {
/* have hw stencil */
if ((ctx->Stencil.WriteMask[0] & 0xff) != 0xff) {
/* not clearing all stencil bits, so use triangle clearing */
tri_mask |= BUFFER_BIT_STENCIL;
}
else {
/* clearing all stencil bits, use blitting */
blit_mask |= BUFFER_BIT_STENCIL;
}
}
}
/* HW depth */
if (depth) {
/* clear depth with whatever method is used for stencil (see above) */
if (tri_mask & BUFFER_BIT_STENCIL)
tri_mask |= BUFFER_BIT_DEPTH;
else
blit_mask |= BUFFER_BIT_DEPTH;
}
/* SW fallback clearing */
swrast_mask = mask & ~tri_mask & ~blit_mask;
for (i = 0; i < BUFFER_COUNT; i++) {
GLuint bufBit = 1 << i;
if ((blit_mask | tri_mask) & bufBit) {
if (!fb->Attachment[i].Renderbuffer->ClassID) {
blit_mask &= ~bufBit;
tri_mask &= ~bufBit;
swrast_mask |= bufBit;
}
}
}
intelFlush(ctx); /* XXX intelClearWithBlit also does this */
if (blit_mask)
intelClearWithBlit(ctx, blit_mask);
#if 0
if (swrast_mask | tri_mask)
_swrast_Clear(ctx, swrast_mask | tri_mask);
#else
softpipe_clear(pipe, GL_FALSE,
(swrast_mask | tri_mask) & BUFFER_BIT_DEPTH,
(swrast_mask | tri_mask) & BUFFER_BIT_STENCIL,
(swrast_mask | tri_mask) & BUFFER_BIT_ACCUM);
#endif
}
/**
* Clear buffers. Called via pipe->clear().
*/
void
intelClear(struct pipe_context *pipe,
GLboolean color, GLboolean depth,
GLboolean stencil, GLboolean accum)
{
GLcontext *ctx = (GLcontext *) pipe->glctx;
struct intel_context *intel = intel_context(ctx);
/* XXX
* Examine stencil and color writemasks to determine if we can clear
* with blits.
*/
intelFlush(&intel->ctx);
LOCK_HARDWARE(intel);
softpipe_clear(pipe, color, depth, stencil, accum);
intel_batchbuffer_flush(intel->batch);
UNLOCK_HARDWARE(intel);
}
/* Emit wait for pending flips */
void
@@ -835,9 +707,6 @@ intelReadBuffer(GLcontext * ctx, GLenum mode)
void
intelInitBufferFuncs(struct dd_function_table *functions)
{
#if 0
functions->Clear = intelClear;
#endif
functions->DrawBuffer = intelDrawBuffer;
functions->ReadBuffer = intelReadBuffer;
}
src/mesa/drivers/dri/i915pipe/intel_buffers.h
-5
View File
@@ -52,9 +52,4 @@ extern void intel_draw_buffer(GLcontext * ctx, struct gl_framebuffer *fb);
extern void intelInitBufferFuncs(struct dd_function_table *functions);
extern void
intelClear(struct pipe_context *pipe,
GLboolean color, GLboolean depth,
GLboolean stencil, GLboolean accum);
#endif /* INTEL_BUFFERS_H */
src/mesa/drivers/dri/i915pipe/intel_context.c
+6 -2
View File
@@ -417,11 +417,15 @@ intelCreateContext(const __GLcontextModes * mesaVis,
*/
st_create_context( &intel->ctx,
softpipe_create() );
/* KW: Not sure I like this - we should only be talking to the
* state_tracker. The pipe code will need some way of talking to
* us, eg for batchbuffer ioctls, and there will need to be a
* buffer manager interface. So, this is a temporary hack, right?
*/
intel->pipe = intel->ctx.st->pipe;
intel->pipe->screen = intelScreen;
intel->pipe->glctx = ctx;
intel->pipe->clear = intelClear;
intelScreen->pipe = intel->pipe;
intel_init_region_functions(intel->pipe);
src/mesa/drivers/dri/i915pipe/intel_regions.c
+1 -157
View File
@@ -75,10 +75,6 @@ intel_region_map(struct pipe_context *pipe, struct pipe_region *region)
{
DBG("%s\n", __FUNCTION__);
if (!region->map_refcount++) {
if (region->pbo) {
pipe->region_cow(pipe, region);
}
region->map = driBOMap(region->buffer,
DRM_BO_FLAG_READ | DRM_BO_FLAG_WRITE, 0);
}
@@ -96,8 +92,6 @@ intel_region_unmap(struct pipe_context *pipe, struct pipe_region *region)
}
}
#undef TEST_CACHED_TEXTURES
static struct pipe_region *
intel_region_alloc(struct pipe_context *pipe,
GLuint cpp, GLuint pitch, GLuint height)
@@ -115,13 +109,9 @@ intel_region_alloc(struct pipe_context *pipe,
driGenBuffers(intelScreen->regionPool,
"region", 1, &region->buffer, 64,
#ifdef TEST_CACHED_TEXTURES
DRM_BO_FLAG_MEM_TT | DRM_BO_FLAG_BIND_CACHED |
DRM_BO_FLAG_READ | DRM_BO_FLAG_WRITE,
#else
0,
#endif
0);
LOCK_HARDWARE(intel);
driBOData(region->buffer, pitch * cpp * height, NULL, 0);
UNLOCK_HARDWARE(intel);
@@ -142,9 +132,6 @@ intel_region_release(struct pipe_context *pipe, struct pipe_region **region)
if ((*region)->refcount == 0) {
assert((*region)->map_refcount == 0);
if ((*region)->pbo)
(*region)->pbo->region = NULL;
(*region)->pbo = NULL;
driBOUnReference((*region)->buffer);
free(*region);
}
@@ -275,15 +262,6 @@ intel_region_data(struct pipe_context *pipe,
if (intel == NULL)
return;
if (dst->pbo) {
if (dstx == 0 &&
dsty == 0 && width == dst->pitch && height == dst->height)
pipe->region_release_pbo(pipe, dst);
else
pipe->region_cow(pipe, dst);
}
LOCK_HARDWARE(intel);
_mesa_copy_rect(pipe->region_map(pipe, dst) + dst_offset,
@@ -317,14 +295,6 @@ intel_region_copy(struct pipe_context *pipe,
if (intel == NULL)
return;
if (dst->pbo) {
if (dstx == 0 &&
dsty == 0 && width == dst->pitch && height == dst->height)
pipe->region_release_pbo(pipe, dst);
else
pipe->region_cow(pipe, dst);
}
assert(src->cpp == dst->cpp);
intelEmitCopyBlit(intel,
@@ -354,141 +324,18 @@ intel_region_fill(struct pipe_context *pipe,
if (intel == NULL)
return;
if (dst->pbo) {
if (dstx == 0 &&
dsty == 0 && width == dst->pitch && height == dst->height)
pipe->region_release_pbo(pipe, dst);
else
pipe->region_cow(pipe, dst);
}
intelEmitFillBlit(intel,
dst->cpp,
dst->pitch, dst->buffer, dst_offset,
dstx, dsty, width, height, value, mask);
}
/* Attach to a pbo, discarding our data. Effectively zero-copy upload
* the pbo's data.
*/
static void
intel_region_attach_pbo(struct pipe_context *pipe,
struct pipe_region *region,
struct intel_buffer_object *pbo)
{
if (region->pbo == pbo)
return;
/* If there is already a pbo attached, break the cow tie now.
* Don't call pipe_region_release_pbo() as that would
* unnecessarily allocate a new buffer we would have to immediately
* discard.
*/
if (region->pbo) {
region->pbo->region = NULL;
region->pbo = NULL;
}
if (region->buffer) {
driDeleteBuffers(1, &region->buffer);
region->buffer = NULL;
}
region->pbo = pbo;
region->pbo->region = region;
region->buffer = driBOReference(pbo->buffer);
}
/* Break the COW tie to the pbo. The pbo gets to keep the data.
*/
static void
intel_region_release_pbo(struct pipe_context *pipe,
struct pipe_region *region)
{
intelScreenPrivate *intelScreen = pipe_screen(pipe);
struct intel_context *intel = intelScreenContext(intelScreen);
assert(region->buffer == region->pbo->buffer);
region->pbo->region = NULL;
region->pbo = NULL;
driBOUnReference(region->buffer);
region->buffer = NULL;
driGenBuffers(intelScreen->regionPool,
"region", 1, &region->buffer, 64, 0, 0);
LOCK_HARDWARE(intel);
driBOData(region->buffer,
region->cpp * region->pitch * region->height, NULL, 0);
UNLOCK_HARDWARE(intel);
}
/* Break the COW tie to the pbo. Both the pbo and the region end up
* with a copy of the data.
*/
static void
intel_region_cow(struct pipe_context *pipe, struct pipe_region *region)
{
intelScreenPrivate *intelScreen = pipe_screen(pipe);
struct intel_context *intel = intelScreenContext(intelScreen);
struct intel_buffer_object *pbo = region->pbo;
if (intel == NULL)
return;
pipe->region_release_pbo(pipe, region);
assert(region->cpp * region->pitch * region->height == pbo->Base.Size);
DBG("%s (%d bytes)\n", __FUNCTION__, pbo->Base.Size);
/* Now blit from the texture buffer to the new buffer:
*/
intel_batchbuffer_flush(intel->batch);
if (!intel->locked) {
LOCK_HARDWARE(intel);
intelEmitCopyBlit(intel,
region->cpp,
region->pitch,
region->buffer, 0,
region->pitch,
pbo->buffer, 0,
0, 0, 0, 0,
region->pitch, region->height,
GL_COPY);
intel_batchbuffer_flush(intel->batch);
UNLOCK_HARDWARE(intel);
}
else {
intelEmitCopyBlit(intel,
region->cpp,
region->pitch,
region->buffer, 0,
region->pitch,
pbo->buffer, 0,
0, 0, 0, 0,
region->pitch, region->height,
GL_COPY);
intel_batchbuffer_flush(intel->batch);
}
}
static struct _DriBufferObject *
intel_region_buffer(struct pipe_context *pipe,
struct pipe_region *region, GLuint flag)
{
if (region->pbo) {
if (flag == INTEL_WRITE_PART)
pipe->region_cow(pipe, region);
else if (flag == INTEL_WRITE_FULL)
pipe->region_release_pbo(pipe, region);
}
return region->buffer;
}
@@ -507,9 +354,6 @@ intel_init_region_functions(struct pipe_context *pipe)
pipe->region_data = intel_region_data;
pipe->region_copy = intel_region_copy;
pipe->region_fill = intel_region_fill;
pipe->region_cow = intel_region_cow;
pipe->region_attach_pbo = intel_region_attach_pbo;
pipe->region_release_pbo = intel_region_release_pbo;
pipe->region_buffer = intel_region_buffer;
}
src/mesa/drivers/dri/i915pipe/intel_screen.c
-1
View File
@@ -101,7 +101,6 @@ intel_recreate_static(struct pipe_context *pipe,
void *virtual,
GLuint cpp, GLuint pitch, GLuint height)
{
struct intel_context *intel = 0;
if (region) {
pipe->region_update_static(pipe, region, mem_type, offset,
virtual, cpp, pitch, height);
src/mesa/drivers/dri/i915pipe/intel_state.c
-2
View File
@@ -245,8 +245,6 @@ intelDepthRange(GLcontext * ctx, GLclampd nearval, GLclampd farval)
static void
intelRenderMode(GLcontext * ctx, GLenum mode)
{
struct intel_context *intel = intel_context(ctx);
FALLBACK(intel, INTEL_FALLBACK_RENDERMODE, (mode != GL_RENDER));
}
src/mesa/drivers/dri/i915pipe/intel_tex_image.c
+1 -32
View File
@@ -254,38 +254,7 @@ try_pbo_zcopy(struct intel_context *intel,
GLint width, GLint height,
GLenum format, GLenum type, const void *pixels)
{
struct intel_buffer_object *pbo = intel_buffer_object(unpack->BufferObj);
GLuint src_offset, src_stride;
GLuint dst_offset, dst_stride;
if (!pbo ||
intel->ctx._ImageTransferState ||
unpack->SkipPixels || unpack->SkipRows) {
_mesa_printf("%s: failure 1\n", __FUNCTION__);
return GL_FALSE;
}
src_offset = (GLuint) pixels;
if (unpack->RowLength > 0)
src_stride = unpack->RowLength;
else
src_stride = width;
dst_offset = intel_miptree_image_offset(intelImage->mt,
intelImage->face,
intelImage->level);
dst_stride = intelImage->mt->pitch;
if (src_stride != dst_stride || dst_offset != 0 || src_offset != 0) {
_mesa_printf("%s: failure 2\n", __FUNCTION__);
return GL_FALSE;
}
intel->pipe->region_attach_pbo(intel->pipe, intelImage->mt->region, pbo);
return GL_TRUE;
return GL_FALSE;
}
src/mesa/main/buffers.c
-8
View File
@@ -178,15 +178,7 @@ _mesa_Clear( GLbitfield mask )
}
ASSERT(ctx->Driver.Clear);
#if 0
ctx->Driver.Clear(ctx, bufferMask);
#else
st_clear(ctx->st,
(mask & GL_COLOR_BUFFER_BIT) ? GL_TRUE : GL_FALSE,
(bufferMask & BUFFER_BIT_DEPTH) ? GL_TRUE : GL_FALSE,
(bufferMask & BUFFER_BIT_STENCIL) ? GL_TRUE : GL_FALSE,
(bufferMask & BUFFER_BIT_ACCUM) ? GL_TRUE : GL_FALSE);
#endif
}
}
src/mesa/pipe/p_context.h
-9
View File
@@ -175,15 +175,6 @@ struct pipe_context {
GLuint width, GLuint height,
GLuint value, GLuint mask);
void (*region_cow)(struct pipe_context *pipe, struct pipe_region *region);
void (*region_attach_pbo)(struct pipe_context *pipe,
struct pipe_region *region,
struct intel_buffer_object *pbo);
void (*region_release_pbo)(struct pipe_context *pipe,
struct pipe_region *region);
struct _DriBufferObject *(*region_buffer)(struct pipe_context *pipe,
struct pipe_region *region,
GLuint flag);
src/mesa/pipe/p_state.h
-3
View File
@@ -238,7 +238,6 @@ struct pipe_sampler_state
struct _DriBufferObject;
struct intel_buffer_object;
struct pipe_region
{
@@ -252,8 +251,6 @@ struct pipe_region
GLuint map_refcount; /**< Reference count for mapping */
GLuint draw_offset; /**< Offset of drawing address within the region */
struct intel_buffer_object *pbo; /* zero-copy uploads */
};
src/mesa/pipe/softpipe/sp_clear.c
+21 -49
View File
@@ -60,53 +60,20 @@ color_value(GLuint format, const GLfloat color[4])
}
}
static GLuint
color_mask(GLuint format, GLuint pipeMask)
{
GLuint mask = 0x0;
switch (format) {
case PIPE_FORMAT_U_R8_G8_B8_A8:
if (pipeMask & PIPE_MASK_R) mask |= 0xff000000;
if (pipeMask & PIPE_MASK_G) mask |= 0x00ff0000;
if (pipeMask & PIPE_MASK_B) mask |= 0x0000ff00;
if (pipeMask & PIPE_MASK_A) mask |= 0x000000ff;
break;
case PIPE_FORMAT_U_A8_R8_G8_B8:
if (pipeMask & PIPE_MASK_R) mask |= 0x00ff0000;
if (pipeMask & PIPE_MASK_G) mask |= 0x0000ff00;
if (pipeMask & PIPE_MASK_B) mask |= 0x000000ff;
if (pipeMask & PIPE_MASK_A) mask |= 0xff000000;
break;
case PIPE_FORMAT_U_R5_G6_B5:
if (pipeMask & PIPE_MASK_R) mask |= 0xf800;
if (pipeMask & PIPE_MASK_G) mask |= 0x07e0;
if (pipeMask & PIPE_MASK_B) mask |= 0x001f;
if (pipeMask & PIPE_MASK_A) mask |= 0;
break;
default:
return 0;
}
return mask;
}
/**
* XXX This should probaby be renamed to something like pipe_clear_with_blits()
* and moved into a device-independent pipe file.
*/
void
softpipe_clear(struct pipe_context *pipe, GLboolean color, GLboolean depth,
GLboolean stencil, GLboolean accum)
{
const struct softpipe_context *softpipe = softpipe_context(pipe);
struct softpipe_context *softpipe = softpipe_context(pipe);
GLint x, y, w, h;
softpipe_update_derived(softpipe);
softpipe_update_derived(softpipe); /* not needed?? */
x = softpipe->cliprect.minx;
y = softpipe->cliprect.miny;
w = softpipe->cliprect.maxx - x;
h = softpipe->cliprect.maxy - y;
x = 0;
y = 0;
w = softpipe->framebuffer.cbufs[0]->width;
h = softpipe->framebuffer.cbufs[0]->height;
if (color) {
GLuint i;
@@ -114,8 +81,7 @@ softpipe_clear(struct pipe_context *pipe, GLboolean color, GLboolean depth,
struct pipe_surface *ps = softpipe->framebuffer.cbufs[i];
GLuint clearVal = color_value(ps->format,
softpipe->clear_color.color);
GLuint mask = color_mask(ps->format, softpipe->blend.colormask);
pipe->region_fill(pipe, ps->region, 0, x, y, w, h, clearVal, mask);
pipe->region_fill(pipe, ps->region, 0, x, y, w, h, clearVal, ~0);
}
}
@@ -124,10 +90,13 @@ softpipe_clear(struct pipe_context *pipe, GLboolean color, GLboolean depth,
/* clear Z and stencil together */
struct pipe_surface *ps = softpipe->framebuffer.zbuf;
if (ps->format == PIPE_FORMAT_S8_Z24) {
GLuint mask = (softpipe->stencil.write_mask[0] << 8) | 0xffffff;
GLuint mask = (softpipe->stencil.write_mask[0] << 8) | 0xffffff;
GLuint clearVal = (GLuint) (softpipe->depth_test.clear * 0xffffff);
assert (mask == ~0);
clearVal |= (softpipe->stencil.clear_value << 24);
pipe->region_fill(pipe, ps->region, 0, x, y, w, h, clearVal, mask);
pipe->region_fill(pipe, ps->region, 0, x, y, w, h, clearVal, ~0);
}
else {
/* XXX Z24_S8 format? */
@@ -138,33 +107,36 @@ softpipe_clear(struct pipe_context *pipe, GLboolean color, GLboolean depth,
/* separate Z and stencil */
if (depth) {
struct pipe_surface *ps = softpipe->framebuffer.zbuf;
GLuint mask, clearVal;
GLuint clearVal;
switch (ps->format) {
case PIPE_FORMAT_U_Z16:
clearVal = (GLuint) (softpipe->depth_test.clear * 65535.0);
mask = 0xffff;
break;
case PIPE_FORMAT_U_Z32:
clearVal = (GLuint) (softpipe->depth_test.clear * 0xffffffff);
mask = 0xffffffff;
break;
case PIPE_FORMAT_S8_Z24:
clearVal = (GLuint) (softpipe->depth_test.clear * 0xffffff);
mask = 0xffffff;
break;
default:
assert(0);
}
pipe->region_fill(pipe, ps->region, 0, x, y, w, h, clearVal, mask);
pipe->region_fill(pipe, ps->region, 0, x, y, w, h, clearVal, ~0);
}
if (stencil) {
struct pipe_surface *ps = softpipe->framebuffer.sbuf;
GLuint clearVal = softpipe->stencil.clear_value;
/* If this is not ~0, we shouldn't get here - clear should be
* done with geometry instead.
*/
GLuint mask = softpipe->stencil.write_mask[0];
assert((mask & 0xff) == 0xff);
switch (ps->format) {
case PIPE_FORMAT_S8_Z24:
clearVal = clearVal << 24;
@@ -187,7 +159,7 @@ softpipe_clear(struct pipe_context *pipe, GLboolean color, GLboolean depth,
*/
struct pipe_surface *ps = softpipe->framebuffer.abuf;
GLuint clearVal = 0x0; /* XXX FIX */
GLuint mask = !0;
GLuint mask = ~0;
assert(ps);
pipe->region_fill(pipe, ps->region, 0, x, y, w, h, clearVal, mask);
}
src/mesa/sources
+1
View File
@@ -191,6 +191,7 @@ STATETRACKER_SOURCES = \
state_tracker/st_atom_stencil.c \
state_tracker/st_atom_stipple.c \
state_tracker/st_atom_viewport.c \
state_tracker/st_cb_clear.c \
state_tracker/st_cb_program.c \
state_tracker/st_draw.c \
state_tracker/st_context.c \
src/mesa/state_tracker/st_cb_clear.c
+89
View File
@@ -0,0 +1,89 @@
/**************************************************************************
*
* Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
* All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
* without limitation the rights to use, copy, modify, merge, publish,
* distribute, sub license, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
*
* The above copyright notice and this permission notice (including the
* next paragraph) shall be included in all copies or substantial portions
* of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
* IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
* ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
**************************************************************************/
/*
* Authors:
* Keith Whitwell <keith@tungstengraphics.com>
* Brian Paul
*/
#include "st_context.h"
#include "glheader.h"
#include "macros.h"
#include "enums.h"
#include "st_context.h"
#include "st_atom.h"
#include "pipe/p_context.h"
/* XXX: doesn't pick up the differences between front/back/left/right
* clears. Need to sort that out...
*/
static void st_clear(GLcontext *ctx, GLbitfield mask)
{
struct st_context *st = ctx->st;
GLboolean color = (mask & BUFFER_BITS_COLOR) ? GL_TRUE : GL_FALSE;
GLboolean depth = (mask & BUFFER_BIT_DEPTH) ? GL_TRUE : GL_FALSE;
GLboolean stencil = (mask & BUFFER_BIT_STENCIL) ? GL_TRUE : GL_FALSE;
GLboolean accum = (mask & BUFFER_BIT_ACCUM) ? GL_TRUE : GL_FALSE;
GLboolean fullscreen = 1; /* :-) */
/* This makes sure the softpipe has the latest scissor, etc values */
st_validate_state( st );
if (fullscreen) {
/* pipe->clear() should clear a particular surface, so that we
* can iterate over render buffers at this level and clear the
* ones GL is asking for.
*
* Will probably need something like pipe->clear_z_stencil() to
* cope with the special case of paired and unpaired z/stencil
* buffers, though could perhaps deal with them explicitly at
* this level.
*/
st->pipe->clear(st->pipe, color, depth, stencil, accum);
}
else {
/* Convert to geometry, etc:
*/
}
}
void st_init_cb_clear( struct st_context *st )
{
struct dd_function_table *functions = &st->ctx->Driver;
functions->Clear = st_clear;
}
void st_destroy_cb_clear( struct st_context *st )
{
}
src/mesa/state_tracker/st_context.c
+1
View File
@@ -58,6 +58,7 @@ struct st_context *st_create_context( GLcontext *ctx,
st_init_atoms( st );
st_init_draw( st );
st_init_cb_program( st );
st_init_cb_clear( st );
return st;
}
src/mesa/state_tracker/st_draw.c
-11
View File
@@ -107,14 +107,3 @@ void st_destroy_draw( struct st_context *st )
}
/** XXX temporary here */
void
st_clear(struct st_context *st, GLboolean color, GLboolean depth,
GLboolean stencil, GLboolean accum)
{
/* This makes sure the softpipe has the latest scissor, etc values */
st_validate_state( st );
st->pipe->clear(st->pipe, color, depth, stencil, accum);
}