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intel/fs: Fix destination suboffset calculations for non-trivial strides in SHUFFLE codegen.

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One of the two SHUFFLE implementations wasn't taking into account the
destination stride at all, and the other (more commonly used) one was
taking it into account incorrectly since brw_reg::hstride represents
the stride logarithmically, so we need to use a left-shift operator
instead of product.  Found by inspection.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14273>
This commit is contained in:
Francisco Jerez
2021-12-20 14:49:02 -08:00
committed by Marge Bot
parent d1038197f3
commit d2d72fccf1
1 changed files with 2 additions and 2 deletions
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4
src/intel/compiler/brw_fs_generator.cpp
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@@ -631,7 +631,7 @@ fs_generator::generate_shuffle(fs_inst *inst,
*/
const unsigned i = idx.file == BRW_IMMEDIATE_VALUE ? idx.ud : 0;
struct brw_reg group_src = stride(suboffset(src, i), 0, 1, 0);
struct brw_reg group_dst = suboffset(dst, group);
struct brw_reg group_dst = suboffset(dst, group << (dst.hstride - 1));
if (type_sz(src.type) > 4 && !devinfo->has_64bit_float) {
brw_MOV(p, subscript(group_dst, BRW_REGISTER_TYPE_UD, 0),
subscript(group_src, BRW_REGISTER_TYPE_UD, 0));
@@ -743,7 +743,7 @@ fs_generator::generate_shuffle(fs_inst *inst,
brw_MOV(p, byte_offset(dst_d, 4),
retype(brw_VxH_indirect(0, 4), BRW_REGISTER_TYPE_D));
} else {
brw_MOV(p, suboffset(dst, group * dst.hstride),
brw_MOV(p, suboffset(dst, group << (dst.hstride - 1)),
retype(brw_VxH_indirect(0, 0), src.type));
}
}