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winsys/amdgpu: handle RADEON_FLAG_ENCRYPTED as a heap modifier

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so that we don't need custom code for encrypted allocations

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16466>
This commit is contained in:
Marek Olšák
2022-05-10 23:52:15 -04:00
parent 593f72aa21
commit d21be64b3a
5 changed files with 23 additions and 69 deletions
Download Patch File Download Diff File Expand all files Collapse all files
src/gallium/include/winsys/radeon_winsys.h
+10 -6
View File
@@ -714,14 +714,15 @@ radeon_bo_reference(struct radeon_winsys *rws, struct pb_buffer **dst, struct pb
#define RADEON_HEAP_BIT_VRAM (1 << 0) /* if false, it's GTT */
#define RADEON_HEAP_BIT_READ_ONLY (1 << 1) /* both VRAM and GTT */
#define RADEON_HEAP_BIT_32BIT (1 << 2) /* both VRAM and GTT */
#define RADEON_HEAP_BIT_ENCRYPTED (1 << 3) /* both VRAM and GTT */
#define RADEON_HEAP_BIT_NO_CPU_ACCESS (1 << 3) /* VRAM only */
#define RADEON_HEAP_BIT_NO_CPU_ACCESS (1 << 4) /* VRAM only */
#define RADEON_HEAP_BIT_WC (1 << 3) /* GTT only, VRAM implies this to be true */
#define RADEON_HEAP_BIT_GL2_BYPASS (1 << 4) /* GTT only */
#define RADEON_HEAP_BIT_WC (1 << 4) /* GTT only, VRAM implies this to be true */
#define RADEON_HEAP_BIT_GL2_BYPASS (1 << 5) /* GTT only */
/* The number of all possible heap descriptions using the bits above. */
#define RADEON_NUM_HEAPS (1 << 5)
#define RADEON_NUM_HEAPS (1 << 6)
static inline enum radeon_bo_domain radeon_domain_from_heap(int heap)
{
@@ -743,6 +744,8 @@ static inline unsigned radeon_flags_from_heap(int heap)
flags |= RADEON_FLAG_READ_ONLY;
if (heap & RADEON_HEAP_BIT_32BIT)
flags |= RADEON_FLAG_32BIT;
if (heap & RADEON_HEAP_BIT_ENCRYPTED)
flags |= RADEON_FLAG_ENCRYPTED;
if (heap & RADEON_HEAP_BIT_VRAM) {
flags |= RADEON_FLAG_GTT_WC;
@@ -808,8 +811,7 @@ static inline int radeon_get_heap_index(enum radeon_bo_domain domain, enum radeo
/* These are unsupported flags. */
/* RADEON_FLAG_DRIVER_INTERNAL is ignored. It doesn't affect allocators. */
/* TODO: handle ENCRYPTED better */
if (flags & (RADEON_FLAG_NO_SUBALLOC | RADEON_FLAG_SPARSE | RADEON_FLAG_ENCRYPTED))
if (flags & (RADEON_FLAG_NO_SUBALLOC | RADEON_FLAG_SPARSE))
return -1;
int heap = 0;
@@ -818,6 +820,8 @@ static inline int radeon_get_heap_index(enum radeon_bo_domain domain, enum radeo
heap |= RADEON_HEAP_BIT_READ_ONLY;
if (flags & RADEON_FLAG_32BIT)
heap |= RADEON_HEAP_BIT_32BIT;
if (flags & RADEON_FLAG_ENCRYPTED)
heap |= RADEON_HEAP_BIT_ENCRYPTED;
if (domain == RADEON_DOMAIN_VRAM) {
/* VRAM | GTT shouldn't occur, but if it does, ignore GTT. */
src/gallium/winsys/amdgpu/drm/amdgpu_bo.c
+10 -40
View File
@@ -239,11 +239,8 @@ static void amdgpu_bo_destroy_or_cache(struct radeon_winsys *rws, struct pb_buff
static void amdgpu_clean_up_buffer_managers(struct amdgpu_winsys *ws)
{
for (unsigned i = 0; i < NUM_SLAB_ALLOCATORS; i++) {
for (unsigned i = 0; i < NUM_SLAB_ALLOCATORS; i++)
pb_slabs_reclaim(&ws->bo_slabs[i]);
if (ws->info.has_tmz_support)
pb_slabs_reclaim(&ws->bo_slabs_encrypted[i]);
}
pb_cache_release_all_buffers(&ws->bo_cache);
}
@@ -629,14 +626,11 @@ bool amdgpu_bo_can_reclaim_slab(void *priv, struct pb_slab_entry *entry)
return amdgpu_bo_can_reclaim(priv, &bo->base);
}
static struct pb_slabs *get_slabs(struct amdgpu_winsys *ws, uint64_t size,
enum radeon_bo_flag flags)
static struct pb_slabs *get_slabs(struct amdgpu_winsys *ws, uint64_t size)
{
struct pb_slabs *bo_slabs = ((flags & RADEON_FLAG_ENCRYPTED) && ws->info.has_tmz_support) ?
ws->bo_slabs_encrypted : ws->bo_slabs;
/* Find the correct slab allocator for the given size. */
for (unsigned i = 0; i < NUM_SLAB_ALLOCATORS; i++) {
struct pb_slabs *slabs = &bo_slabs[i];
struct pb_slabs *slabs = &ws->bo_slabs[i];
if (size <= 1 << (slabs->min_order + slabs->num_orders - 1))
return slabs;
@@ -663,7 +657,7 @@ static void amdgpu_bo_slab_destroy(struct radeon_winsys *rws, struct pb_buffer *
assert(!bo->bo);
slabs = get_slabs(ws, bo->base.size, bo->base.usage & RADEON_FLAG_ENCRYPTED);
slabs = get_slabs(ws, bo->base.size);
if (bo->base.placement & RADEON_DOMAIN_VRAM)
ws->slab_wasted_vram -= get_slab_wasted_size(ws, bo);
@@ -699,10 +693,8 @@ static unsigned get_slab_entry_alignment(struct amdgpu_winsys *ws, unsigned size
return entry_size;
}
static struct pb_slab *amdgpu_bo_slab_alloc(void *priv, unsigned heap,
unsigned entry_size,
unsigned group_index,
bool encrypted)
struct pb_slab *amdgpu_bo_slab_alloc(void *priv, unsigned heap, unsigned entry_size,
unsigned group_index)
{
struct amdgpu_winsys *ws = priv;
struct amdgpu_slab *slab = CALLOC_STRUCT(amdgpu_slab);
@@ -714,15 +706,9 @@ static struct pb_slab *amdgpu_bo_slab_alloc(void *priv, unsigned heap,
if (!slab)
return NULL;
if (encrypted)
flags |= RADEON_FLAG_ENCRYPTED;
struct pb_slabs *slabs = ((flags & RADEON_FLAG_ENCRYPTED) && ws->info.has_tmz_support) ?
ws->bo_slabs_encrypted : ws->bo_slabs;
/* Determine the slab buffer size. */
for (unsigned i = 0; i < NUM_SLAB_ALLOCATORS; i++) {
unsigned max_entry_size = 1 << (slabs[i].min_order + slabs[i].num_orders - 1);
unsigned max_entry_size = 1 << (ws->bo_slabs[i].min_order + ws->bo_slabs[i].num_orders - 1);
if (entry_size <= max_entry_size) {
/* The slab size is twice the size of the largest possible entry. */
@@ -815,20 +801,6 @@ fail:
return NULL;
}
struct pb_slab *amdgpu_bo_slab_alloc_encrypted(void *priv, unsigned heap,
unsigned entry_size,
unsigned group_index)
{
return amdgpu_bo_slab_alloc(priv, heap, entry_size, group_index, true);
}
struct pb_slab *amdgpu_bo_slab_alloc_normal(void *priv, unsigned heap,
unsigned entry_size,
unsigned group_index)
{
return amdgpu_bo_slab_alloc(priv, heap, entry_size, group_index, false);
}
void amdgpu_bo_slab_free(struct amdgpu_winsys *ws, struct pb_slab *pslab)
{
struct amdgpu_slab *slab = amdgpu_slab(pslab);
@@ -1364,9 +1336,7 @@ amdgpu_bo_create(struct amdgpu_winsys *ws,
radeon_canonicalize_bo_flags(&domain, &flags);
struct pb_slabs *slabs = ((flags & RADEON_FLAG_ENCRYPTED) && ws->info.has_tmz_support) ?
ws->bo_slabs_encrypted : ws->bo_slabs;
struct pb_slabs *last_slab = &slabs[NUM_SLAB_ALLOCATORS - 1];
struct pb_slabs *last_slab = &ws->bo_slabs[NUM_SLAB_ALLOCATORS - 1];
unsigned max_slab_entry_size = 1 << (last_slab->min_order + last_slab->num_orders - 1);
/* Sub-allocate small buffers from slabs. */
@@ -1400,7 +1370,7 @@ amdgpu_bo_create(struct amdgpu_winsys *ws,
}
}
struct pb_slabs *slabs = get_slabs(ws, alloc_size, flags);
struct pb_slabs *slabs = get_slabs(ws, alloc_size);
entry = pb_slab_alloc(slabs, alloc_size, heap);
if (!entry) {
/* Clean up buffer managers and try again. */
@@ -1446,7 +1416,7 @@ no_slab:
bool use_reusable_pool = flags & RADEON_FLAG_NO_INTERPROCESS_SHARING;
if (use_reusable_pool) {
heap = radeon_get_heap_index(domain, flags & ~RADEON_FLAG_ENCRYPTED);
heap = radeon_get_heap_index(domain, flags);
assert(heap >= 0 && heap < RADEON_NUM_HEAPS);
/* Get a buffer from the cache. */
src/gallium/winsys/amdgpu/drm/amdgpu_bo.h
+2 -6
View File
@@ -132,12 +132,8 @@ void amdgpu_bo_unmap(struct radeon_winsys *rws, struct pb_buffer *buf);
void amdgpu_bo_init_functions(struct amdgpu_screen_winsys *ws);
bool amdgpu_bo_can_reclaim_slab(void *priv, struct pb_slab_entry *entry);
struct pb_slab *amdgpu_bo_slab_alloc_encrypted(void *priv, unsigned heap,
unsigned entry_size,
unsigned group_index);
struct pb_slab *amdgpu_bo_slab_alloc_normal(void *priv, unsigned heap,
unsigned entry_size,
unsigned group_index);
struct pb_slab *amdgpu_bo_slab_alloc(void *priv, unsigned heap, unsigned entry_size,
unsigned group_index);
void amdgpu_bo_slab_free(struct amdgpu_winsys *ws, struct pb_slab *slab);
static inline
src/gallium/winsys/amdgpu/drm/amdgpu_winsys.c
+1 -16
View File
@@ -474,22 +474,7 @@ amdgpu_winsys_create(int fd, const struct pipe_screen_config *config,
RADEON_NUM_HEAPS, true,
aws,
amdgpu_bo_can_reclaim_slab,
amdgpu_bo_slab_alloc_normal,
/* Cast to void* because one of the function parameters
* is a struct pointer instead of void*. */
(void*)amdgpu_bo_slab_free)) {
amdgpu_winsys_destroy(&ws->base);
simple_mtx_unlock(&dev_tab_mutex);
return NULL;
}
if (aws->info.has_tmz_support &&
!pb_slabs_init(&aws->bo_slabs_encrypted[i],
min_order, max_order,
RADEON_NUM_HEAPS, true,
aws,
amdgpu_bo_can_reclaim_slab,
amdgpu_bo_slab_alloc_encrypted,
amdgpu_bo_slab_alloc,
/* Cast to void* because one of the function parameters
* is a struct pointer instead of void*. */
(void*)amdgpu_bo_slab_free)) {
src/gallium/winsys/amdgpu/drm/amdgpu_winsys.h
-1
View File
@@ -64,7 +64,6 @@ struct amdgpu_winsys {
* need to layer the allocators, so that we don't waste too much memory.
*/
struct pb_slabs bo_slabs[NUM_SLAB_ALLOCATORS];
struct pb_slabs bo_slabs_encrypted[NUM_SLAB_ALLOCATORS];
amdgpu_device_handle dev;