ac/nir/ngg,radv: use intrinsic base for instance_rate_inputs check
radeonsi use packed location base while radv use un-packed location. So we adjust instance_rate_inputs in each driver to hide the difference. Note the attribute slot number is less than 16, so we can shift instance_rate_inputs in radv by VERT_ATTRIB_GENERIC0 which is 16. Reviewed-by: Timur Kristóf <timur.kristof@gmail.com> Signed-off-by: Qiang Yu <yuq825@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19868>
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@@ -856,8 +856,7 @@ cleanup_culling_shader_after_dce(nir_shader *shader,
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uses_vs_instance_id = true;
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break;
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case nir_intrinsic_load_input:
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if (state->options->instance_rate_inputs &
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(1u << (nir_intrinsic_base(intrin) - VERT_ATTRIB_GENERIC0)))
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if (state->options->instance_rate_inputs & BITFIELD_BIT(nir_intrinsic_base(intrin)))
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uses_vs_instance_id = true;
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else
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uses_vs_vertex_id = true;
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@@ -1461,7 +1461,7 @@ void radv_lower_ngg(struct radv_device *device, struct radv_pipeline_stage *ngg_
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options.early_prim_export = info->has_ngg_early_prim_export;
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options.passthrough = info->is_ngg_passthrough;
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options.primitive_id_location = info->outinfo.export_prim_id ? VARYING_SLOT_PRIMITIVE_ID : -1;
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options.instance_rate_inputs = pl_key->vs.instance_rate_inputs;
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options.instance_rate_inputs = pl_key->vs.instance_rate_inputs << VERT_ATTRIB_GENERIC0;
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NIR_PASS_V(nir, ac_nir_lower_ngg_nogs, &options);
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