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i965/screen: Honor 'allow_rgb10_configs' option. (v2)

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Allows to prevent exposing RGB10 configs and visuals to
clients.

v2: Rename expose_rgb10_configs to allow_rgb10_configs,
    as suggested by Emil.

Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
This commit is contained in:
Mario Kleiner
2017-12-15 23:04:55 +01:00
committed by Marek Olšák
parent 67674ad0dc
commit cfb98bcdd0
1 changed files with 19 additions and 0 deletions
Download Patch File Download Diff File Expand all files Collapse all files
src/mesa/drivers/dri/i965/intel_screen.c
+19
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@@ -2063,11 +2063,20 @@ intel_screen_make_configs(__DRIscreen *dri_screen)
else
num_formats = ARRAY_SIZE(formats) - 2; /* all - RGBA_ORDERING formats */
/* Shall we expose 10 bpc formats? */
bool allow_rgb10_configs = driQueryOptionb(&dri_screen->optionCache,
"allow_rgb10_configs");
/* Generate singlesample configs without accumulation buffer. */
for (unsigned i = 0; i < num_formats; i++) {
__DRIconfig **new_configs;
int num_depth_stencil_bits = 2;
if (!allow_rgb10_configs &&
(formats[i] == MESA_FORMAT_B10G10R10A2_UNORM ||
formats[i] == MESA_FORMAT_B10G10R10X2_UNORM))
continue;
/* Starting with DRI2 protocol version 1.1 we can request a depth/stencil
* buffer that has a different number of bits per pixel than the color
* buffer, gen >= 6 supports this.
@@ -2104,6 +2113,11 @@ intel_screen_make_configs(__DRIscreen *dri_screen)
for (unsigned i = 0; i < num_formats; i++) {
__DRIconfig **new_configs;
if (!allow_rgb10_configs &&
(formats[i] == MESA_FORMAT_B10G10R10A2_UNORM ||
formats[i] == MESA_FORMAT_B10G10R10X2_UNORM))
continue;
if (formats[i] == MESA_FORMAT_B5G6R5_UNORM) {
depth_bits[0] = 16;
stencil_bits[0] = 0;
@@ -2137,6 +2151,11 @@ intel_screen_make_configs(__DRIscreen *dri_screen)
if (devinfo->gen < 6)
break;
if (!allow_rgb10_configs &&
(formats[i] == MESA_FORMAT_B10G10R10A2_UNORM ||
formats[i] == MESA_FORMAT_B10G10R10X2_UNORM))
continue;
__DRIconfig **new_configs;
const int num_depth_stencil_bits = 2;
int num_msaa_modes = 0;