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anv/pipeline: Unify 3DSTATE_RASTER and 3DSTATE_SF setup between gen7 and gen8

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Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
This commit is contained in:
Jason Ekstrand
2016-08-06 08:28:23 -07:00
parent 960e8a1260
commit ce980541d5
3 changed files with 62 additions and 91 deletions
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src/intel/vulkan/gen7_pipeline.c
+1 -42
View File
@@ -34,47 +34,6 @@
#include "genX_pipeline_util.h"
static void
gen7_emit_rs_state(struct anv_pipeline *pipeline,
const VkPipelineRasterizationStateCreateInfo *info,
const struct anv_graphics_pipeline_create_info *extra)
{
struct GENX(3DSTATE_SF) sf = {
GENX(3DSTATE_SF_header),
/* LegacyGlobalDepthBiasEnable */
.StatisticsEnable = true,
.FrontFaceFillMode = vk_to_gen_fillmode[info->polygonMode],
.BackFaceFillMode = vk_to_gen_fillmode[info->polygonMode],
.ViewportTransformEnable = !(extra && extra->use_rectlist),
.FrontWinding = vk_to_gen_front_face[info->frontFace],
/* bool AntiAliasingEnable; */
.CullMode = vk_to_gen_cullmode[info->cullMode],
/* uint32_t LineEndCapAntialiasingRegionWidth; */
.ScissorRectangleEnable = !(extra && extra->use_rectlist),
/* uint32_t MultisampleRasterizationMode; */
/* bool LastPixelEnable; */
.TriangleStripListProvokingVertexSelect = 0,
.LineStripListProvokingVertexSelect = 0,
.TriangleFanProvokingVertexSelect = 1,
/* uint32_t AALineDistanceMode; */
/* uint32_t VertexSubPixelPrecisionSelect; */
.PointWidthSource = Vertex,
.PointWidth = 1.0,
.GlobalDepthOffsetEnableSolid = info->depthBiasEnable,
.GlobalDepthOffsetEnableWireframe = info->depthBiasEnable,
.GlobalDepthOffsetEnablePoint = info->depthBiasEnable,
};
GENX(3DSTATE_SF_pack)(NULL, &pipeline->gen7.sf, &sf);
}
VkResult
genX(graphics_pipeline_create)(
VkDevice _device,
@@ -108,7 +67,7 @@ genX(graphics_pipeline_create)(
emit_vertex_input(pipeline, pCreateInfo->pVertexInputState, extra);
assert(pCreateInfo->pRasterizationState);
gen7_emit_rs_state(pipeline, pCreateInfo->pRasterizationState, extra);
emit_rs_state(pipeline, pCreateInfo->pRasterizationState, extra);
emit_ds_state(pipeline, pCreateInfo->pDepthStencilState, pass, subpass);
src/intel/vulkan/gen8_pipeline.c
-49
View File
@@ -44,55 +44,6 @@ emit_ia_state(struct anv_pipeline *pipeline,
}
}
static void
emit_rs_state(struct anv_pipeline *pipeline,
const VkPipelineRasterizationStateCreateInfo *info,
const struct anv_graphics_pipeline_create_info *extra)
{
struct GENX(3DSTATE_SF) sf = {
GENX(3DSTATE_SF_header),
};
sf.ViewportTransformEnable = !(extra && extra->use_rectlist);
sf.StatisticsEnable = true;
sf.TriangleStripListProvokingVertexSelect = 0;
sf.LineStripListProvokingVertexSelect = 0;
sf.TriangleFanProvokingVertexSelect = 1;
sf.PointWidthSource = Vertex;
sf.PointWidth = 1.0;
GENX(3DSTATE_SF_pack)(NULL, pipeline->gen8.sf, &sf);
struct GENX(3DSTATE_RASTER) raster = {
GENX(3DSTATE_RASTER_header),
};
/* For details on 3DSTATE_RASTER multisample state, see the BSpec table
* "Multisample Modes State".
*/
raster.DXMultisampleRasterizationEnable = true;
raster.ForcedSampleCount = FSC_NUMRASTSAMPLES_0;
raster.ForceMultisampling = false;
raster.FrontWinding = vk_to_gen_front_face[info->frontFace];
raster.CullMode = vk_to_gen_cullmode[info->cullMode];
raster.FrontFaceFillMode = vk_to_gen_fillmode[info->polygonMode];
raster.BackFaceFillMode = vk_to_gen_fillmode[info->polygonMode];
raster.ScissorRectangleEnable = !(extra && extra->use_rectlist);
#if GEN_GEN == 8
raster.ViewportZClipTestEnable = !pipeline->depth_clamp_enable;
#else
/* GEN9+ splits ViewportZClipTestEnable into near and far enable bits */
raster.ViewportZFarClipTestEnable = !pipeline->depth_clamp_enable;
raster.ViewportZNearClipTestEnable = !pipeline->depth_clamp_enable;
#endif
raster.GlobalDepthOffsetEnableSolid = info->depthBiasEnable;
raster.GlobalDepthOffsetEnableWireframe = info->depthBiasEnable;
raster.GlobalDepthOffsetEnablePoint = info->depthBiasEnable;
GENX(3DSTATE_RASTER_pack)(NULL, pipeline->gen8.raster, &raster);
}
static void
emit_ms_state(struct anv_pipeline *pipeline,
const VkPipelineMultisampleStateCreateInfo *info)
src/intel/vulkan/genX_pipeline_util.h
+61
View File
@@ -362,6 +362,67 @@ static const uint32_t vk_to_gen_front_face[] = {
[VK_FRONT_FACE_CLOCKWISE] = 0
};
static void
emit_rs_state(struct anv_pipeline *pipeline,
const VkPipelineRasterizationStateCreateInfo *info,
const struct anv_graphics_pipeline_create_info *extra)
{
struct GENX(3DSTATE_SF) sf = {
GENX(3DSTATE_SF_header),
};
sf.ViewportTransformEnable = !(extra && extra->use_rectlist);
sf.StatisticsEnable = true;
sf.TriangleStripListProvokingVertexSelect = 0;
sf.LineStripListProvokingVertexSelect = 0;
sf.TriangleFanProvokingVertexSelect = 1;
sf.PointWidthSource = Vertex;
sf.PointWidth = 1.0;
#if GEN_GEN >= 8
struct GENX(3DSTATE_RASTER) raster = {
GENX(3DSTATE_RASTER_header),
};
#else
# define raster sf
#endif
/* For details on 3DSTATE_RASTER multisample state, see the BSpec table
* "Multisample Modes State".
*/
#if GEN_GEN >= 8
raster.DXMultisampleRasterizationEnable = true;
raster.ForcedSampleCount = FSC_NUMRASTSAMPLES_0;
raster.ForceMultisampling = false;
#endif
raster.FrontWinding = vk_to_gen_front_face[info->frontFace];
raster.CullMode = vk_to_gen_cullmode[info->cullMode];
raster.FrontFaceFillMode = vk_to_gen_fillmode[info->polygonMode];
raster.BackFaceFillMode = vk_to_gen_fillmode[info->polygonMode];
raster.ScissorRectangleEnable = !(extra && extra->use_rectlist);
#if GEN_GEN >= 9
/* GEN9+ splits ViewportZClipTestEnable into near and far enable bits */
raster.ViewportZFarClipTestEnable = !pipeline->depth_clamp_enable;
raster.ViewportZNearClipTestEnable = !pipeline->depth_clamp_enable;
#elif GEN_GEN >= 8
raster.ViewportZClipTestEnable = !pipeline->depth_clamp_enable;
#endif
raster.GlobalDepthOffsetEnableSolid = info->depthBiasEnable;
raster.GlobalDepthOffsetEnableWireframe = info->depthBiasEnable;
raster.GlobalDepthOffsetEnablePoint = info->depthBiasEnable;
#if GEN_GEN >= 8
GENX(3DSTATE_SF_pack)(NULL, pipeline->gen8.sf, &sf);
GENX(3DSTATE_RASTER_pack)(NULL, pipeline->gen8.raster, &raster);
#else
# undef raster
GENX(3DSTATE_SF_pack)(NULL, &pipeline->gen7.sf, &sf);
#endif
}
static const uint32_t vk_to_gen_logic_op[] = {
[VK_LOGIC_OP_COPY] = LOGICOP_COPY,
[VK_LOGIC_OP_CLEAR] = LOGICOP_CLEAR,