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pan/va: Add non-IDVS VAR_TEX instructions

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Used in blit shaders.

Icecream95 supplied the test cases.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15588>
This commit is contained in:
Alyssa Rosenzweig
2022-05-02 10:55:33 -04:00
parent 030e00dea2
commit ce6d5094c8
3 changed files with 97 additions and 0 deletions
Download Patch File Download Diff File Expand all files Collapse all files
src/panfrost/bifrost/valhall/ISA.xml
+90
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@@ -2551,6 +2551,96 @@
<src>Varying offset</src>
</ins>
<ins name="VAR_TEX_SINGLE" title="Fused varying-texturing" opcode="0x138" unit="VT">
<desc>
Only works for FP32 varyings. Performance characteristics are similar
to LD_VAR_IMM_F32.v2.f32 followed by TEX, using both V and T units.
</desc>
<slot/>
<skip/>
<sample_and_update/>
<register_type/>
<vartex_register_width/>
<dimension/>
<array_enable/>
<shadow/>
<lod_mode/>
<sr_write_count/>
<sr write="true"/>
<src size="64">Image to read from</src>
<src>Varying offset</src>
</ins>
<ins name="VAR_TEX_GATHER" title="Fused varying-texturing" opcode="0x139" unit="VT">
<desc>
Only works for FP32 varyings. Performance characteristics are similar
to LD_VAR_IMM_F32.v2.f32 followed by TEX, using both V and T units.
</desc>
<slot/>
<skip/>
<sample_and_update/>
<register_type/>
<vartex_register_width/>
<dimension/>
<array_enable/>
<integer_coordinates/>
<fetch_component/>
<shadow/>
<sr_write_count/>
<sr write="true"/>
<src size="64">Image to read from</src>
<src>Varying offset</src>
</ins>
<ins name="VAR_TEX_GRADIENT" title="Fused varying-texturing" opcode="0x13A" unit="VT">
<desc>
Only works for FP32 varyings. Performance characteristics are similar
to LD_VAR_IMM_F32.v2.f32 followed by TEX, using both V and T units.
</desc>
<slot/>
<skip/>
<sample_and_update/>
<register_type/>
<vartex_register_width/>
<dimension/>
<array_enable/>
<shadow/>
<lod_bias_disable/>
<lod_clamp_disable/>
<sr_write_count/>
<sr write="true"/>
<src size="64">Image to read from</src>
<src>Varying offset</src>
</ins>
<ins name="VAR_TEX_DUAL" title="Fused varying-texturing" opcode="0x13F" unit="VT">
<desc>
Only works for FP32 varyings. Performance characteristics are similar
to LD_VAR_IMM_F32.v2.f32 followed by TEX_DUAL, using both V and T units.
</desc>
<slot/>
<skip/>
<sample_and_update/>
<register_type/>
<vartex_register_width/>
<dimension/>
<array_enable/>
<shadow/>
<lod_mode/>
<sr_write_count/>
<sr write="true"/>
<src size="64">Image to read from</src>
<src>Varying offset</src>
</ins>
<ins name="FMA_RSCALE.f32" title="Fused floating-point multiply add with exponent bias" dests="1" opcode="0x160" unit="FMA">
<desc>
First calculates $A \cdot B + C$ and then biases the exponent by D. Used in
src/panfrost/bifrost/valhall/test/assembler-cases.txt
+3
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@@ -220,3 +220,6 @@ c0 f1 00 00 10 c1 2f 08 BRANCHZI.eq.absolute.wait0 0x0, blend_descriptor_0.w1
32 00 80 18 02 4c 68 08 ATOM.i32.slot0.aadd.wait0 @r12, r50, offset:0x0
32 00 00 18 02 8c 69 08 ATOM1_RETURN.i32.slot0.ainc.wait0 @r12, r50, offset:0x0
32 00 00 18 00 80 69 08 ATOM1_RETURN.i32.slot0.ainc.wait0 @, r50, offset:0x0
82 00 80 15 b4 80 38 49 VAR_TEX_SINGLE.slot0.skip.sample_store.f.32.2d.zero.wait @r0:r1:r2:r3, u2, u0
82 20 80 15 b4 80 38 09 VAR_TEX_SINGLE.slot0.skip.sample_store.f.32.2d.computed.wait0 @r0:r1:r2:r3, u2, u0
82 20 80 1d 84 80 38 41 VAR_TEX_SINGLE.slot0.skip.sample_store.s.32.2d.computed.wait0126 @r0, u2, u0
src/panfrost/bifrost/valhall/valhall.c.py
+4
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@@ -66,6 +66,10 @@ SKIP = set([
"CLPER.v4u8",
# VAR_TEX
"VAR_TEX_SINGLE",
"VAR_TEX_GATHER",
"VAR_TEX_GRADIENT",
"VAR_TEX_DUAL",
"VAR_TEX_BUF_SINGLE",
"VAR_TEX_BUF_GATHER",
"VAR_TEX_BUF_GRADIENT",