ac: add ac_gpu_info::has_stable_pstate
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14038>
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@@ -1164,6 +1164,8 @@ bool ac_query_gpu_info(int fd, void *dev_p, struct radeon_info *info,
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info->has_gds_ordered_append = info->chip_class >= GFX7 && info->drm_minor >= 29;
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info->has_stable_pstate = info->drm_minor >= 45;
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if (info->chip_class >= GFX9 && info->has_graphics) {
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unsigned pc_lines = 0;
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@@ -1394,6 +1396,7 @@ void ac_print_gpu_info(struct radeon_info *info, FILE *f)
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fprintf(f, " has_2d_tiling = %u\n", info->has_2d_tiling);
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fprintf(f, " has_read_registers_query = %u\n", info->has_read_registers_query);
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fprintf(f, " has_gds_ordered_append = %u\n", info->has_gds_ordered_append);
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fprintf(f, " has_stable_pstate = %u\n", info->has_stable_pstate);
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fprintf(f, " has_scheduled_fence_dependency = %u\n", info->has_scheduled_fence_dependency);
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fprintf(f, " mid_command_buffer_preemption_enabled = %u\n",
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info->mid_command_buffer_preemption_enabled);
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@@ -187,6 +187,7 @@ struct radeon_info {
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bool has_read_registers_query;
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bool has_gds_ordered_append;
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bool has_scheduled_fence_dependency;
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bool has_stable_pstate;
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/* Whether SR-IOV is enabled or amdgpu.mcbp=1 was set on the kernel command line. */
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bool mid_command_buffer_preemption_enabled;
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bool has_tmz_support;
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