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nv50/ir/nir: add conversion ops for bit width < 32

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Reviewed-by: Karol Herbst <kherbst@redhat.com>
Signed-off-by: Danilo Krummrich <dakr@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18109>
This commit is contained in:
Danilo Krummrich
2022-08-01 14:39:12 +02:00
parent 79b92af9da
commit cd53bcd325
1 changed files with 52 additions and 0 deletions
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52
src/nouveau/codegen/nv50_ir_from_nir.cpp
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@@ -393,16 +393,24 @@ Converter::getOperation(nir_op op)
return OP_COS;
case nir_op_f2f32:
case nir_op_f2f64:
case nir_op_f2i8:
case nir_op_f2i16:
case nir_op_f2i32:
case nir_op_f2i64:
case nir_op_f2u8:
case nir_op_f2u16:
case nir_op_f2u32:
case nir_op_f2u64:
case nir_op_i2f32:
case nir_op_i2f64:
case nir_op_i2i8:
case nir_op_i2i16:
case nir_op_i2i32:
case nir_op_i2i64:
case nir_op_u2f32:
case nir_op_u2f64:
case nir_op_u2u8:
case nir_op_u2u16:
case nir_op_u2u32:
case nir_op_u2u64:
return OP_CVT;
@@ -465,6 +473,18 @@ Converter::getOperation(nir_op op)
return OP_RSQ;
case nir_op_fsat:
return OP_SAT;
case nir_op_ieq8:
case nir_op_ige8:
case nir_op_uge8:
case nir_op_ilt8:
case nir_op_ult8:
case nir_op_ine8:
case nir_op_ieq16:
case nir_op_ige16:
case nir_op_uge16:
case nir_op_ilt16:
case nir_op_ult16:
case nir_op_ine16:
case nir_op_feq32:
case nir_op_ieq32:
case nir_op_fge32:
@@ -703,19 +723,31 @@ CondCode
Converter::getCondCode(nir_op op)
{
switch (op) {
case nir_op_ieq8:
case nir_op_ieq16:
case nir_op_feq32:
case nir_op_ieq32:
return CC_EQ;
case nir_op_ige8:
case nir_op_uge8:
case nir_op_ige16:
case nir_op_uge16:
case nir_op_fge32:
case nir_op_ige32:
case nir_op_uge32:
return CC_GE;
case nir_op_ilt8:
case nir_op_ult8:
case nir_op_ilt16:
case nir_op_ult16:
case nir_op_flt32:
case nir_op_ilt32:
case nir_op_ult32:
return CC_LT;
case nir_op_fneu32:
return CC_NEU;
case nir_op_ine8:
case nir_op_ine16:
case nir_op_ine32:
return CC_NE;
default:
@@ -2614,6 +2646,14 @@ Converter::visit(nir_alu_instr *insn)
break;
}
// convert instructions
case nir_op_f2i8:
case nir_op_f2u8:
case nir_op_i2i8:
case nir_op_u2u8:
case nir_op_f2i16:
case nir_op_f2u16:
case nir_op_i2i16:
case nir_op_u2u16:
case nir_op_f2f32:
case nir_op_f2i32:
case nir_op_f2u32:
@@ -2637,6 +2677,18 @@ Converter::visit(nir_alu_instr *insn)
break;
}
// compare instructions
case nir_op_ieq8:
case nir_op_ige8:
case nir_op_uge8:
case nir_op_ilt8:
case nir_op_ult8:
case nir_op_ine8:
case nir_op_ieq16:
case nir_op_ige16:
case nir_op_uge16:
case nir_op_ilt16:
case nir_op_ult16:
case nir_op_ine16:
case nir_op_feq32:
case nir_op_ieq32:
case nir_op_fge32: