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radeonsi: stop using TGSI_PROPERTY_FS_COLOR0_WRITES_ALL_CBUFS

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Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6624>
This commit is contained in:
Marek Olšák
2020-09-01 18:41:36 -04:00
committed by Marge Bot
parent 89cf8789cd
commit cb7bc983ae
4 changed files with 4 additions and 5 deletions
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src/gallium/drivers/radeonsi/si_pipe.h
+1 -1
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@@ -1781,7 +1781,7 @@ static inline unsigned si_get_total_colormask(struct si_context *sctx)
unsigned colormask =
sctx->framebuffer.colorbuf_enabled_4bit & sctx->queued.named.blend->cb_target_mask;
if (!ps->info.properties[TGSI_PROPERTY_FS_COLOR0_WRITES_ALL_CBUFS])
if (!ps->info.color0_writes_all_cbufs)
colormask &= ps->colors_written_4bit;
else if (!ps->colors_written_4bit)
colormask = 0; /* color0 writes all cbufs, but it's not written */
src/gallium/drivers/radeonsi/si_shader.h
+1 -2
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@@ -343,6 +343,7 @@ struct si_shader_info {
ubyte colors_read; /**< which color components are read by the FS */
ubyte colors_written;
bool color0_writes_all_cbufs; /**< gl_FragColor */
bool reads_samplemask; /**< does fragment shader read sample mask? */
bool reads_tess_factors; /**< If TES reads TESSINNER or TESSOUTER */
bool writes_z; /**< does fragment shader write Z value? */
@@ -392,8 +393,6 @@ struct si_shader_info {
unsigned msaa_images_declared; /**< bitmask of declared MSAA images */
unsigned shader_buffers_declared; /**< bitmask of declared shader buffers */
unsigned properties[TGSI_PROPERTY_COUNT]; /* index with TGSI_PROPERTY_ */
/** Whether all codepaths write tess factors in all invocations. */
bool tessfactors_are_def_in_all_invocs;
};
src/gallium/drivers/radeonsi/si_shader_nir.c
+1 -1
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@@ -114,7 +114,7 @@ static void scan_io_usage(struct si_shader_info *info, nir_intrinsic_instr *intr
/* Never use FRAG_RESULT_COLOR directly. */
if (semantic == FRAG_RESULT_COLOR) {
semantic = FRAG_RESULT_DATA0;
info->properties[TGSI_PROPERTY_FS_COLOR0_WRITES_ALL_CBUFS] = true;
info->color0_writes_all_cbufs = true;
}
semantic += nir_intrinsic_io_semantics(intr).dual_source_blend_index;
}
src/gallium/drivers/radeonsi/si_state_shaders.c
+1 -1
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@@ -1889,7 +1889,7 @@ static inline void si_shader_selector_key(struct pipe_context *ctx, struct si_sh
struct si_state_rasterizer *rs = sctx->queued.named.rasterizer;
struct si_state_blend *blend = sctx->queued.named.blend;
if (sel->info.properties[TGSI_PROPERTY_FS_COLOR0_WRITES_ALL_CBUFS] &&
if (sel->info.color0_writes_all_cbufs &&
sel->info.colors_written == 0x1)
key->part.ps.epilog.last_cbuf = MAX2(sctx->framebuffer.state.nr_cbufs, 1) - 1;