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radv/nir/lower_cmat: use explicit shift when calculating gfx12 wave64 layout

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The rest of the compiler stack doesn't understand the alignment implications
of the combined shift.

Effect on llama.cpp fossils:
Totals from 3 (13.64% of 22) affected shaders:
Instrs: 5778 -> 5684 (-1.63%)
CodeSize: 33540 -> 32800 (-2.21%)
VGPRs: 228 -> 216 (-5.26%)
Latency: 39942 -> 39417 (-1.31%)
InvThroughput: 12037 -> 11862 (-1.45%)
VALU: 2162 -> 2111 (-2.36%)

More importantly, this replaces some ds_load_2addr_b32 with ds_load_b64.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/13447
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36016>
This commit is contained in:
Georg Lehmann
2025-07-08 22:49:01 +02:00
committed by Marge Bot
parent f617b4f850
commit cac60c39a9
1 changed files with 3 additions and 4 deletions
Download Patch File Download Diff File Expand all files Collapse all files
src/amd/vulkan/nir/radv_nir_lower_cooperative_matrix.c
+3 -4
View File
@@ -152,10 +152,9 @@ radv_get_base_row(nir_builder *b, struct glsl_cmat_description desc, const lower
base_row = nir_udiv_imm(b, local_idx, 16);
if (params->wave_size == 64) {
/* Switch rows from lanes 16..31 to 32..47, offset right shift by -2
* to get implicit * 4.
*/
base_row = nir_ushr_imm(b, nir_bitfield_reverse(b, base_row), 30 - 2);
/* Switch rows from lanes 16..31 to 32..47 */
base_row = nir_ushr_imm(b, nir_bitfield_reverse(b, base_row), 30);
base_row = nir_imul_imm(b, base_row, 4);
} else {
base_row = nir_imul_imm(b, base_row, 8);
}