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ir3: use ir3_64b helpers where possible

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Don't rely on manually (un)packing 64b values from/into components but
use the newly introduced ir3_64b helpers.

Signed-off-by: Job Noorman <jnoorman@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33797>
This commit is contained in:
Job Noorman
2025-06-12 12:14:47 +02:00
committed by Marge Bot
parent 7cf01a1ae0
commit c91f4b2363
2 changed files with 12 additions and 48 deletions
Download Patch File Download Diff File Expand all files Collapse all files
src/freedreno/ir3/ir3_a6xx.c
+7 -36
View File
@@ -248,28 +248,15 @@ emit_intrinsic_atomic_ssbo(struct ir3_context *ctx, nir_intrinsic_instr *intr)
*
* Note that nir already multiplies the offset by four
*/
dummy = create_immed(b, 0);
dummy = intr->def.bit_size == 64 ? ir3_64b_immed(b, 0) : create_immed(b, 0);
if (op == nir_atomic_op_cmpxchg) {
src0 = ir3_get_src(ctx, &intr->src[4])[0];
struct ir3_instruction *compare = ir3_get_src(ctx, &intr->src[3])[0];
if (intr->def.bit_size == 64) {
struct ir3_instruction *dummy2 = create_immed(b, 0);
struct ir3_instruction *compare2 = ir3_get_src(ctx, &intr->src[3])[1];
struct ir3_instruction *data2 = ir3_get_src(ctx, &intr->src[2])[1];
src1 = ir3_collect(b, dummy, dummy2, compare, compare2, data, data2);
} else {
src1 = ir3_collect(b, dummy, compare, data);
}
src1 = ir3_collect(b, dummy, compare, data);
} else {
src0 = ir3_get_src(ctx, &intr->src[3])[0];
if (intr->def.bit_size == 64) {
struct ir3_instruction *dummy2 = create_immed(b, 0);
struct ir3_instruction *data2 = ir3_get_src(ctx, &intr->src[2])[1];
src1 = ir3_collect(b, dummy, dummy2, data, data2);
} else {
src1 = ir3_collect(b, dummy, data);
}
src1 = ir3_collect(b, dummy, data);
}
atomic = emit_atomic(b, op, ibo, src0, src1);
@@ -286,12 +273,8 @@ emit_intrinsic_atomic_ssbo(struct ir3_context *ctx, nir_intrinsic_instr *intr)
atomic->dsts[0]->wrmask = src1->dsts[0]->wrmask;
ir3_reg_tie(atomic->dsts[0], atomic->srcs[2]);
ir3_handle_nonuniform(atomic, intr);
size_t num_results = intr->def.bit_size == 64 ? 2 : 1;
struct ir3_instruction *defs[num_results];
ir3_split_dest(b, defs, atomic, 0, num_results);
return ir3_create_collect(b, defs, num_results);
}
return ir3_split_off_scalar(b, atomic, intr->def.bit_size);
}
/* src[] = { deref, coord, sample_index }. const_index[] = {} */
static void
@@ -530,20 +513,8 @@ emit_intrinsic_atomic_global(struct ir3_context *ctx, nir_intrinsic_instr *intr)
if (op == nir_atomic_op_cmpxchg) {
struct ir3_instruction *compare = ir3_get_src(ctx, &intr->src[2])[0];
src1 = ir3_collect(b, compare, value);
if (intr->def.bit_size == 64) {
struct ir3_instruction *compare2 = ir3_get_src(ctx, &intr->src[2])[1];
struct ir3_instruction *value2 = ir3_get_src(ctx, &intr->src[1])[1];
src1 = ir3_collect(b, compare, compare2, value, value2);
} else {
src1 = ir3_collect(b, compare, value);
}
} else {
if (intr->def.bit_size == 64) {
struct ir3_instruction *value2 = ir3_get_src(ctx, &intr->src[1])[1];
src1 = ir3_collect(b, value, value2);
} else {
src1 = value;
}
src1 = ir3_collect(b, value);
}
switch (op) {
@@ -593,7 +564,7 @@ emit_intrinsic_atomic_global(struct ir3_context *ctx, nir_intrinsic_instr *intr)
/* even if nothing consume the result, we can't DCE the instruction: */
array_insert(ctx->block, ctx->block->keeps, atomic);
return atomic;
return ir3_split_off_scalar(b, atomic, intr->def.bit_size);
}
const struct ir3_context_funcs ir3_a6xx_funcs = {
src/freedreno/ir3/ir3_compiler_nir.c
+5 -12
View File
@@ -1100,19 +1100,15 @@ emit_alu(struct ir3_context *ctx, nir_alu_instr *alu)
set_instr_flags(dst.rpts, dst_sz, IR3_INSTR_SAT);
break;
case nir_op_pack_64_2x32_split: {
struct ir3_instruction *r0 = ir3_MOV(b, src[0].rpts[0], TYPE_U32);
struct ir3_instruction *r1 = ir3_MOV(b, src[1].rpts[0], TYPE_U32);
dst.rpts[0] = r0;
dst.rpts[1] = r1;
dst_sz = 2;
dst.rpts[0] = ir3_64b(b, src[0].rpts[0], src[1].rpts[0]);
break;
}
case nir_op_unpack_64_2x32_split_x: {
ir3_split_dest(b, &dst.rpts[0], src[0].rpts[0], 0, 1);
dst.rpts[0] = ir3_MOV(b, ir3_64b_get_lo(src[0].rpts[0]), TYPE_U32);
break;
}
case nir_op_unpack_64_2x32_split_y: {
ir3_split_dest(b, &dst.rpts[0], src[0].rpts[0], 1, 1);
dst.rpts[0] = ir3_MOV(b, ir3_64b_get_hi(src[0].rpts[0]), TYPE_U32);
break;
}
case nir_op_udot_4x8_uadd:
@@ -3392,7 +3388,7 @@ emit_load_const(struct ir3_context *ctx, nir_load_const_instr *instr)
{
unsigned bit_size = ir3_bitsize(ctx, instr->def.bit_size);
struct ir3_instruction **dst =
ir3_get_dst_ssa(ctx, &instr->def, instr->def.num_components * ((bit_size == 64) ? 2 : 1));
ir3_get_dst_ssa(ctx, &instr->def, instr->def.num_components);
if (bit_size <= 8) {
for (int i = 0; i < instr->def.num_components; i++)
@@ -3408,10 +3404,7 @@ emit_load_const(struct ir3_context *ctx, nir_load_const_instr *instr)
} else {
assert(instr->def.num_components == 1);
for (int i = 0; i < instr->def.num_components; i++) {
dst[2 * i] = create_immed_typed(
&ctx->build, (uint32_t)(instr->value[i].u64), TYPE_U32);
dst[2 * i + 1] = create_immed_typed(
&ctx->build, (uint32_t)(instr->value[i].u64 >> 32), TYPE_U32);
dst[i] = ir3_64b_immed(&ctx->build, instr->value[i].u64);
}
}
}