intel/elk: Move nir_options to its own c/h file pair
This will allow intel-clc tool to use the ELK nir_options in its NIR codepath without having to link with the entire ELK compiler. That way an Anv only build doesn't need to compile ELK. Iris uses that codepath for Gfx8. Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27563>
This commit is contained in:
Caio Oliveira
@@ -25,83 +25,11 @@
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#include "elk_shader.h"
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#include "elk_eu.h"
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#include "elk_nir.h"
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#include "elk_nir_options.h"
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#include "dev/intel_debug.h"
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#include "compiler/nir/nir.h"
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#include "util/u_debug.h"
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#define COMMON_OPTIONS \
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.has_uclz = true, \
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.lower_fdiv = true, \
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.lower_scmp = true, \
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.lower_flrp16 = true, \
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.lower_fmod = true, \
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.lower_ufind_msb = true, \
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.lower_uadd_carry = true, \
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.lower_usub_borrow = true, \
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.lower_flrp64 = true, \
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.lower_fisnormal = true, \
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.lower_isign = true, \
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.lower_ldexp = true, \
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.lower_bitfield_extract = true, \
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.lower_bitfield_insert = true, \
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.lower_device_index_to_zero = true, \
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.vectorize_io = true, \
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.vectorize_tess_levels = true, \
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.use_interpolated_input_intrinsics = true, \
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.lower_insert_byte = true, \
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.lower_insert_word = true, \
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.vertex_id_zero_based = true, \
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.lower_base_vertex = true, \
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.support_16bit_alu = true, \
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.lower_uniforms_to_ubo = true
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#define COMMON_SCALAR_OPTIONS \
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.lower_to_scalar = true, \
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.lower_pack_half_2x16 = true, \
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.lower_pack_snorm_2x16 = true, \
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.lower_pack_snorm_4x8 = true, \
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.lower_pack_unorm_2x16 = true, \
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.lower_pack_unorm_4x8 = true, \
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.lower_unpack_half_2x16 = true, \
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.lower_unpack_snorm_2x16 = true, \
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.lower_unpack_snorm_4x8 = true, \
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.lower_unpack_unorm_2x16 = true, \
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.lower_unpack_unorm_4x8 = true, \
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.lower_hadd64 = true, \
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.avoid_ternary_with_two_constants = true, \
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.has_pack_32_4x8 = true, \
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.max_unroll_iterations = 32, \
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.force_indirect_unrolling = nir_var_function_temp, \
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.divergence_analysis_options = \
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(nir_divergence_single_patch_per_tcs_subgroup | \
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nir_divergence_single_patch_per_tes_subgroup | \
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nir_divergence_shader_record_ptr_uniform)
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const struct nir_shader_compiler_options elk_scalar_nir_options = {
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COMMON_OPTIONS,
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COMMON_SCALAR_OPTIONS,
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};
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const struct nir_shader_compiler_options elk_vector_nir_options = {
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COMMON_OPTIONS,
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/* In the vec4 backend, our dpN instruction replicates its result to all the
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* components of a vec4. We would like NIR to give us replicated fdot
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* instructions because it can optimize better for us.
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*/
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.fdot_replicates = true,
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.lower_usub_sat = true,
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.lower_pack_snorm_2x16 = true,
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.lower_pack_unorm_2x16 = true,
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.lower_unpack_snorm_2x16 = true,
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.lower_unpack_unorm_2x16 = true,
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.lower_extract_byte = true,
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.lower_extract_word = true,
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.intel_vec4 = true,
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.max_unroll_iterations = 32,
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};
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struct elk_compiler *
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elk_compiler_create(void *mem_ctx, const struct intel_device_info *devinfo)
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{
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@@ -32,9 +32,6 @@
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extern "C" {
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#endif
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extern const struct nir_shader_compiler_options elk_scalar_nir_options;
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extern const struct nir_shader_compiler_options elk_vector_nir_options;
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int elk_type_size_vec4(const struct glsl_type *type, bool bindless);
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int elk_type_size_dvec4(const struct glsl_type *type, bool bindless);
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@@ -0,0 +1,79 @@
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/*
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* Copyright 2024 Intel Corporation
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* SPDX-License-Identifier: MIT
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*/
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#include "elk_nir_options.h"
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#define COMMON_OPTIONS \
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.has_uclz = true, \
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.lower_fdiv = true, \
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.lower_scmp = true, \
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.lower_flrp16 = true, \
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.lower_fmod = true, \
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.lower_ufind_msb = true, \
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.lower_uadd_carry = true, \
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.lower_usub_borrow = true, \
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.lower_flrp64 = true, \
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.lower_fisnormal = true, \
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.lower_isign = true, \
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.lower_ldexp = true, \
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.lower_bitfield_extract = true, \
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.lower_bitfield_insert = true, \
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.lower_device_index_to_zero = true, \
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.vectorize_io = true, \
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.vectorize_tess_levels = true, \
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.use_interpolated_input_intrinsics = true, \
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.lower_insert_byte = true, \
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.lower_insert_word = true, \
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.vertex_id_zero_based = true, \
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.lower_base_vertex = true, \
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.support_16bit_alu = true, \
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.lower_uniforms_to_ubo = true
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#define COMMON_SCALAR_OPTIONS \
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.lower_to_scalar = true, \
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.lower_pack_half_2x16 = true, \
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.lower_pack_snorm_2x16 = true, \
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.lower_pack_snorm_4x8 = true, \
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.lower_pack_unorm_2x16 = true, \
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.lower_pack_unorm_4x8 = true, \
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.lower_unpack_half_2x16 = true, \
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.lower_unpack_snorm_2x16 = true, \
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.lower_unpack_snorm_4x8 = true, \
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.lower_unpack_unorm_2x16 = true, \
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.lower_unpack_unorm_4x8 = true, \
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.lower_hadd64 = true, \
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.avoid_ternary_with_two_constants = true, \
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.has_pack_32_4x8 = true, \
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.max_unroll_iterations = 32, \
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.force_indirect_unrolling = nir_var_function_temp, \
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.divergence_analysis_options = \
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(nir_divergence_single_patch_per_tcs_subgroup | \
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nir_divergence_single_patch_per_tes_subgroup | \
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nir_divergence_shader_record_ptr_uniform)
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const struct nir_shader_compiler_options elk_scalar_nir_options = {
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COMMON_OPTIONS,
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COMMON_SCALAR_OPTIONS,
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};
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const struct nir_shader_compiler_options elk_vector_nir_options = {
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COMMON_OPTIONS,
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/* In the vec4 backend, our dpN instruction replicates its result to all the
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* components of a vec4. We would like NIR to give us replicated fdot
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* instructions because it can optimize better for us.
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*/
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.fdot_replicates = true,
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.lower_usub_sat = true,
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.lower_pack_snorm_2x16 = true,
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.lower_pack_unorm_2x16 = true,
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.lower_unpack_snorm_2x16 = true,
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.lower_unpack_unorm_2x16 = true,
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.lower_extract_byte = true,
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.lower_extract_word = true,
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.intel_vec4 = true,
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.max_unroll_iterations = 32,
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};
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@@ -0,0 +1,22 @@
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/*
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* Copyright 2024 Intel Corporation
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* SPDX-License-Identifier: MIT
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*/
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#ifndef ELK_NIR_OPTIONS_H
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#define ELK_NIR_OPTIONS_H
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#include "nir.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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extern const struct nir_shader_compiler_options elk_scalar_nir_options;
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extern const struct nir_shader_compiler_options elk_vector_nir_options;
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#ifdef __cplusplus
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}
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#endif
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#endif /* ELK_NIR_OPTIONS_H */
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@@ -88,6 +88,8 @@ libintel_compiler_elk_files = files(
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'elk_nir_lower_alpha_to_coverage.c',
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'elk_nir_lower_cs_intrinsics.c',
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'elk_nir_lower_storage_image.c',
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'elk_nir_options.h',
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'elk_nir_options.c',
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'elk_nir_private.h',
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'elk_packed_float.c',
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'elk_predicated_break.cpp',
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