radeonsi: implement DCC fast clear swizzle constraints more accurately
Reduce swizzle constraints to the ALPHA_IS_ON_MSB constraint and the clear value of 1. This significantly changes the DCC fast clear code, and fixes fast clear for RGB formats without alpha. Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
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@@ -93,7 +93,27 @@ static void si_set_clear_color(struct r600_texture *rtex,
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memcpy(rtex->color_clear_value, &uc, 2 * sizeof(uint32_t));
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}
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static bool vi_get_fast_clear_parameters(enum pipe_format surface_format,
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/** Linearize and convert luminace/intensity to red. */
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enum pipe_format si_simplify_cb_format(enum pipe_format format)
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{
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format = util_format_linear(format);
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format = util_format_luminance_to_red(format);
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return util_format_intensity_to_red(format);
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}
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bool vi_alpha_is_on_msb(enum pipe_format format)
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{
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format = si_simplify_cb_format(format);
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/* Formats with 3 channels can't have alpha. */
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if (util_format_description(format)->nr_channels == 3)
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return true; /* same as xxxA; is any value OK here? */
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return si_translate_colorswap(format, false) <= 1;
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}
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static bool vi_get_fast_clear_parameters(enum pipe_format base_format,
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enum pipe_format surface_format,
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const union pipe_color_union *color,
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uint32_t* clear_value,
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bool *eliminate_needed)
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@@ -103,17 +123,14 @@ static bool vi_get_fast_clear_parameters(enum pipe_format surface_format,
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* formats).
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*/
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bool values[4] = {}; /* whether to clear to 0 or 1 */
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int i;
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bool color_value = false; /* clear color to 0 or 1 */
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bool alpha_value = false; /* clear alpha to 0 or 1 */
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int alpha_channel; /* index of the alpha component */
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bool has_color = false;
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bool has_alpha = false;
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/* Convert luminance to red. (the latter can't handle L8_SRGB,
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* so convert to linear) */
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surface_format = util_format_linear(surface_format);
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surface_format = util_format_luminance_to_red(surface_format);
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const struct util_format_description *desc = util_format_description(surface_format);
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const struct util_format_description *desc =
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util_format_description(si_simplify_cb_format(surface_format));
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/* 128-bit fast clear with different R,G,B values is unsupported. */
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if (desc->block.bits == 128 &&
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@@ -124,24 +141,22 @@ static bool vi_get_fast_clear_parameters(enum pipe_format surface_format,
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*eliminate_needed = true;
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*clear_value = 0x20202020U; /* use CB clear color registers */
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if (surface_format == PIPE_FORMAT_R11G11B10_FLOAT ||
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surface_format == PIPE_FORMAT_B5G6R5_UNORM ||
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surface_format == PIPE_FORMAT_B5G6R5_SRGB ||
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util_format_is_alpha(surface_format)) {
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alpha_channel = -1;
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} else if (desc->layout == UTIL_FORMAT_LAYOUT_PLAIN) {
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if (si_translate_colorswap(surface_format, false) <= 1)
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alpha_channel = desc->nr_channels - 1;
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else
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alpha_channel = 0;
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} else
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if (desc->layout != UTIL_FORMAT_LAYOUT_PLAIN)
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return true; /* need ELIMINATE_FAST_CLEAR */
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for (i = 0; i < 4; ++i) {
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int index = desc->swizzle[i] - PIPE_SWIZZLE_X;
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bool base_alpha_is_on_msb = vi_alpha_is_on_msb(base_format);
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bool surf_alpha_is_on_msb = vi_alpha_is_on_msb(surface_format);
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if (desc->swizzle[i] < PIPE_SWIZZLE_X ||
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desc->swizzle[i] > PIPE_SWIZZLE_W)
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/* Formats with 3 channels can't have alpha. */
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if (desc->nr_channels == 3)
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alpha_channel = -1;
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else if (surf_alpha_is_on_msb)
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alpha_channel = desc->nr_channels - 1;
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else
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alpha_channel = 0;
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for (int i = 0; i < 4; ++i) {
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if (desc->swizzle[i] >= PIPE_SWIZZLE_0)
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continue;
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if (desc->channel[i].pure_integer &&
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@@ -166,18 +181,32 @@ static bool vi_get_fast_clear_parameters(enum pipe_format surface_format,
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return true; /* need ELIMINATE_FAST_CLEAR */
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}
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if (index == alpha_channel)
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if (desc->swizzle[i] == alpha_channel) {
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alpha_value = values[i];
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else
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has_alpha = true;
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} else {
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color_value = values[i];
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has_color = true;
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}
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}
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for (int i = 0; i < 4; ++i)
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if (values[i] != color_value &&
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desc->swizzle[i] - PIPE_SWIZZLE_X != alpha_channel &&
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desc->swizzle[i] >= PIPE_SWIZZLE_X &&
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desc->swizzle[i] <= PIPE_SWIZZLE_W)
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return true; /* need ELIMINATE_FAST_CLEAR */
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/* If alpha isn't present, make it the same as color, and vice versa. */
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if (!has_alpha)
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alpha_value = color_value;
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else if (!has_color)
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color_value = alpha_value;
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if (color_value != alpha_value &&
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base_alpha_is_on_msb != surf_alpha_is_on_msb)
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return true; /* require ELIMINATE_FAST_CLEAR */
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/* Check if all color values are equal if they are present. */
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for (int i = 0; i < 4; ++i) {
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if (desc->swizzle[i] <= PIPE_SWIZZLE_W &&
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desc->swizzle[i] != alpha_channel &&
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values[i] != color_value)
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return true; /* require ELIMINATE_FAST_CLEAR */
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}
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/* This doesn't need ELIMINATE_FAST_CLEAR.
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* CB uses both the DCC clear codes and the CB clear color registers,
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@@ -454,7 +483,8 @@ static void si_do_fast_color_clear(struct si_context *sctx,
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!tex->surface.u.legacy.level[level].dcc_fast_clear_size)
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continue;
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if (!vi_get_fast_clear_parameters(fb->cbufs[i]->format,
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if (!vi_get_fast_clear_parameters(tex->resource.b.b.format,
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fb->cbufs[i]->format,
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color, &reset_value,
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&eliminate_needed))
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continue;
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@@ -879,6 +879,8 @@ void si_init_screen_buffer_functions(struct si_screen *sscreen);
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void si_init_buffer_functions(struct si_context *sctx);
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/* si_clear.c */
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enum pipe_format si_simplify_cb_format(enum pipe_format format);
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bool vi_alpha_is_on_msb(enum pipe_format format);
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void vi_dcc_clear_level(struct si_context *sctx,
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struct r600_texture *rtex,
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unsigned level, unsigned clear_value);
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@@ -3742,9 +3742,7 @@ si_make_texture_descriptor(struct si_screen *screen,
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}
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if (tex->dcc_offset) {
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unsigned swap = si_translate_colorswap(pipe_format, false);
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state[6] = S_008F28_ALPHA_IS_ON_MSB(swap <= 1);
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state[6] = S_008F28_ALPHA_IS_ON_MSB(vi_alpha_is_on_msb(pipe_format));
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} else {
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/* The last dword is unused by hw. The shader uses it to clear
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* bits in the first dword of sampler state.
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