AlexIndustrial/mesa
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

ac: remove unused code

Browse Source 
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32780>
This commit is contained in:
Marek Olšák
2024-12-25 03:50:45 -05:00
committed by Marge Bot
parent 4e89690878
commit c6fd69bd5e
10 changed files with 0 additions and 118 deletions
Download Patch File Download Diff File Expand all files Collapse all files
src/amd/common/ac_linux_drm.c
-12
View File
@@ -654,18 +654,6 @@ int ac_drm_query_video_caps_info(int device_fd, unsigned cap_type, unsigned size
return drm_ioctl_write(device_fd, DRM_AMDGPU_INFO, &request, sizeof(struct drm_amdgpu_info));
}
int ac_drm_query_gpuvm_fault_info(int device_fd, unsigned size, void *value)
{
struct drm_amdgpu_info request;
memset(&request, 0, sizeof(request));
request.return_pointer = (uintptr_t)value;
request.return_size = size;
request.query = AMDGPU_INFO_GPUVM_FAULT;
return drm_ioctl_write(device_fd, DRM_AMDGPU_INFO, &request, sizeof(struct drm_amdgpu_info));
}
int ac_drm_vm_reserve_vmid(int device_fd, uint32_t flags)
{
union drm_amdgpu_vm vm;
src/amd/common/ac_linux_drm.h
-1
View File
@@ -94,7 +94,6 @@ PROC int ac_drm_query_sensor_info(int device_fd, unsigned sensor_type, unsigned
void *value) TAIL;
PROC int ac_drm_query_video_caps_info(int device_fd, unsigned cap_type, unsigned size,
void *value) TAIL;
PROC int ac_drm_query_gpuvm_fault_info(int device_fd, unsigned size, void *value) TAIL;
PROC int ac_drm_vm_reserve_vmid(int device_fd, uint32_t flags) TAIL;
PROC int ac_drm_vm_unreserve_vmid(int device_fd, uint32_t flags) TAIL;
PROC int ac_drm_create_userqueue(int device_fd, uint32_t ip_type, uint32_t doorbell_handle,
src/amd/common/ac_msgpack.c
-41
View File
@@ -191,44 +191,3 @@ void ac_msgpack_add_uint(struct ac_msgpack *msgpack, uint64_t val)
msgpack->offset = msgpack->offset + 9;
}
}
void ac_msgpack_add_int(struct ac_msgpack *msgpack, int64_t val)
{
if ((val >= -0x7f) && (val <= 0x7f)) {
if ((val >= -31) && (val < 0)) {
if (!ac_msgpack_resize_if_required(msgpack, 1))
return;
msgpack->mem[msgpack->offset] = val | MSGPACK_NIL_OP;
msgpack->offset = msgpack->offset + 1;
} else if ((val >= 0) && (val <= 127)) {
if (!ac_msgpack_resize_if_required(msgpack, 1))
return;
msgpack->mem[msgpack->offset] = val;
msgpack->offset = msgpack->offset + 1;
} else {
if (!ac_msgpack_resize_if_required(msgpack, 2))
return;
msgpack->mem[msgpack->offset] = MSGPACK_INT8_OP;
msgpack->mem[msgpack->offset + 1] = val;
msgpack->offset = msgpack->offset + 2;
}
} else if ((val >= -0x7fff) && (val <= 0x7fff)) {
if (!ac_msgpack_resize_if_required(msgpack, 3))
return;
msgpack->mem[msgpack->offset] = MSGPACK_INT16_OP;
*((int16_t*)&msgpack->mem[msgpack->offset + 1]) = util_bswap32(val);
msgpack->offset = msgpack->offset + 3;
} else if ((val >= -0x7fffffff) && (val <= 0x7fffffff)) {
if (!ac_msgpack_resize_if_required(msgpack, 5))
return;
msgpack->mem[msgpack->offset] = MSGPACK_INT32_OP;
*((int32_t*)&msgpack->mem[msgpack->offset + 1]) = util_bswap32(val);
msgpack->offset = msgpack->offset + 5;
} else {
if (!ac_msgpack_resize_if_required(msgpack, 9))
return;
msgpack->mem[msgpack->offset] = MSGPACK_INT64_OP;
*((int64_t*)&msgpack->mem[msgpack->offset + 1]) = util_bswap64(val);
msgpack->offset = msgpack->offset + 9;
}
}
src/amd/common/ac_msgpack.h
-1
View File
@@ -21,6 +21,5 @@ void ac_msgpack_add_fixmap_op(struct ac_msgpack *msgpack, uint32_t n);
void ac_msgpack_add_fixarray_op(struct ac_msgpack *msgpack, uint32_t n);
void ac_msgpack_add_fixstr(struct ac_msgpack *msgpack, const char *str);
void ac_msgpack_add_uint(struct ac_msgpack *msgpack, uint64_t val);
void ac_msgpack_add_int(struct ac_msgpack *msgpack, int64_t val);
#endif
src/amd/common/ac_shader_util.c
-24
View File
@@ -556,30 +556,6 @@ unsigned ac_get_tbuffer_format(enum amd_gfx_level gfx_level, unsigned dfmt, unsi
}
}
static const struct ac_data_format_info data_format_table[] = {
[V_008F0C_BUF_DATA_FORMAT_INVALID] = {0, 4, 0, V_008F0C_BUF_DATA_FORMAT_INVALID},
[V_008F0C_BUF_DATA_FORMAT_8] = {1, 1, 1, V_008F0C_BUF_DATA_FORMAT_8},
[V_008F0C_BUF_DATA_FORMAT_16] = {2, 1, 2, V_008F0C_BUF_DATA_FORMAT_16},
[V_008F0C_BUF_DATA_FORMAT_8_8] = {2, 2, 1, V_008F0C_BUF_DATA_FORMAT_8},
[V_008F0C_BUF_DATA_FORMAT_32] = {4, 1, 4, V_008F0C_BUF_DATA_FORMAT_32},
[V_008F0C_BUF_DATA_FORMAT_16_16] = {4, 2, 2, V_008F0C_BUF_DATA_FORMAT_16},
[V_008F0C_BUF_DATA_FORMAT_10_11_11] = {4, 3, 0, V_008F0C_BUF_DATA_FORMAT_10_11_11},
[V_008F0C_BUF_DATA_FORMAT_11_11_10] = {4, 3, 0, V_008F0C_BUF_DATA_FORMAT_11_11_10},
[V_008F0C_BUF_DATA_FORMAT_10_10_10_2] = {4, 4, 0, V_008F0C_BUF_DATA_FORMAT_10_10_10_2},
[V_008F0C_BUF_DATA_FORMAT_2_10_10_10] = {4, 4, 0, V_008F0C_BUF_DATA_FORMAT_2_10_10_10},
[V_008F0C_BUF_DATA_FORMAT_8_8_8_8] = {4, 4, 1, V_008F0C_BUF_DATA_FORMAT_8},
[V_008F0C_BUF_DATA_FORMAT_32_32] = {8, 2, 4, V_008F0C_BUF_DATA_FORMAT_32},
[V_008F0C_BUF_DATA_FORMAT_16_16_16_16] = {8, 4, 2, V_008F0C_BUF_DATA_FORMAT_16},
[V_008F0C_BUF_DATA_FORMAT_32_32_32] = {12, 3, 4, V_008F0C_BUF_DATA_FORMAT_32},
[V_008F0C_BUF_DATA_FORMAT_32_32_32_32] = {16, 4, 4, V_008F0C_BUF_DATA_FORMAT_32},
};
const struct ac_data_format_info *ac_get_data_format_info(unsigned dfmt)
{
assert(dfmt < ARRAY_SIZE(data_format_table));
return &data_format_table[dfmt];
}
#define DUP2(v) v, v
#define DUP3(v) v, v, v
#define DUP4(v) v, v, v, v
src/amd/common/ac_shader_util.h
-2
View File
@@ -257,8 +257,6 @@ uint32_t ac_vgt_gs_mode(unsigned gs_max_vert_out, enum amd_gfx_level gfx_level);
unsigned ac_get_tbuffer_format(enum amd_gfx_level gfx_level, unsigned dfmt, unsigned nfmt);
const struct ac_data_format_info *ac_get_data_format_info(unsigned dfmt);
const struct ac_vtx_format_info *ac_get_vtx_format_info_table(enum amd_gfx_level level,
enum radeon_family family);
src/amd/common/ac_sqtt.c
-11
View File
@@ -113,17 +113,6 @@ ac_is_sqtt_complete(const struct radeon_info *rad_info, const struct ac_sqtt *da
return info->cur_offset == info->gfx9_write_counter;
}
uint32_t
ac_get_expected_buffer_size(struct radeon_info *rad_info, const struct ac_sqtt_data_info *info)
{
if (rad_info->gfx_level >= GFX10) {
uint32_t dropped_cntr_per_se = info->gfx10_dropped_cntr / rad_info->max_se;
return ((info->cur_offset * 32) + dropped_cntr_per_se) / 1024;
}
return (info->gfx9_write_counter * 32) / 1024;
}
bool
ac_sqtt_add_pso_correlation(struct ac_sqtt *sqtt, uint64_t pipeline_hash, uint64_t api_hash)
{
src/amd/common/ac_sqtt.h
-3
View File
@@ -101,9 +101,6 @@ void ac_sqtt_finish(struct ac_sqtt *data);
bool ac_is_sqtt_complete(const struct radeon_info *rad_info, const struct ac_sqtt *sqtt,
const struct ac_sqtt_data_info *info);
uint32_t ac_get_expected_buffer_size(struct radeon_info *rad_info,
const struct ac_sqtt_data_info *info);
/**
* Identifiers for RGP SQ thread-tracing markers (Table 1)
*/
src/amd/common/amd_family.c
-22
View File
@@ -93,28 +93,6 @@ enum amd_gfx_level ac_get_gfx_level(enum radeon_family family)
return GFX6;
}
unsigned ac_get_family_id(enum radeon_family family)
{
if (family >= CHIP_GFX1200)
return FAMILY_GFX12;
if (family >= CHIP_GFX1150)
return FAMILY_GFX1150;
if (family >= CHIP_NAVI31)
return FAMILY_NV3;
if (family >= CHIP_NAVI21)
return FAMILY_NV;
if (family >= CHIP_NAVI10)
return FAMILY_NV;
if (family >= CHIP_VEGA10)
return FAMILY_AI;
if (family >= CHIP_TONGA)
return FAMILY_VI;
if (family >= CHIP_BONAIRE)
return FAMILY_CI;
return FAMILY_SI;
}
const char *ac_get_llvm_processor_name(enum radeon_family family)
{
switch (family) {
src/amd/common/amd_family.h
-1
View File
@@ -255,7 +255,6 @@ enum sdma_version {
const char *ac_get_family_name(enum radeon_family family);
enum amd_gfx_level ac_get_gfx_level(enum radeon_family family);
unsigned ac_get_family_id(enum radeon_family family);
const char *ac_get_llvm_processor_name(enum radeon_family family);
const char *ac_get_ip_type_string(const struct radeon_info *info, enum amd_ip_type ip_type);