r600/sfn: rework testing readport config for more than one source

When checking the readport config for a number of sources that
would be used in a multi-slot instruction, then return the index
of the source for which readport allocation fails.
With that we can later add a mov instruction to change the source
channels configuration.

In addition pass a std::array instead of a C-array to make the interface
more c++-like and prepare for the next patch.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36860>
This commit is contained in:
Gert Wollny
2025-08-11 23:35:57 +02:00
committed by Marge Bot
parent 4c94467e5f
commit c4a3e8981d
4 changed files with 21 additions and 13 deletions
@@ -71,8 +71,8 @@ public:
void visit(const UniformValue& value) override;
};
bool
AluReadportReservation::schedule_vec_src(PVirtualValue src[3],
unsigned
AluReadportReservation::schedule_vec_src(const std::array<PVirtualValue, 3>& src,
int nsrc,
AluBankSwizzle swz)
{
@@ -90,9 +90,12 @@ AluReadportReservation::schedule_vec_src(PVirtualValue src[3],
visitor.cycle = cycle_vec(swz, i);
visitor.isrc = i;
src[i]->accept(visitor);
if (!visitor.success) {
return i;
}
}
return visitor.success;
return nsrc;
}
bool
@@ -17,7 +17,9 @@ public:
AluReadportReservation(const AluReadportReservation& orig) = default;
AluReadportReservation& operator=(const AluReadportReservation& orig) = default;
bool schedule_vec_src(PVirtualValue src[3], int nsrc, AluBankSwizzle swz);
unsigned schedule_vec_src(const std::array<PVirtualValue, 3>& src,
int nsrc,
AluBankSwizzle swz);
bool schedule_vec_instruction(const AluInstr& alu, AluBankSwizzle swz);
bool schedule_trans_instruction(const AluInstr& alu, AluBankSwizzle swz);
@@ -711,7 +711,7 @@ AluInstr::check_readport_validation(PRegister old_src, PVirtualValue new_src) co
assert(nsrc * m_alu_slots == m_src.size());
for (int s = 0; s < m_alu_slots && success; ++s) {
PVirtualValue src[3];
std::array<PVirtualValue, 3> src;
auto ireg = m_src.begin() + s * nsrc;
for (unsigned i = 0; i < nsrc; ++i, ++ireg)
@@ -720,7 +720,7 @@ AluInstr::check_readport_validation(PRegister old_src, PVirtualValue new_src) co
AluBankSwizzle bs = alu_vec_012;
while (bs != alu_vec_unknown) {
AluReadportReservation rpr = rpr_sum;
if (rpr.schedule_vec_src(src, nsrc, bs)) {
if (rpr.schedule_vec_src(src, nsrc, bs) == nsrc) {
rpr_sum = rpr;
break;
}
@@ -877,7 +877,7 @@ AluInstr::split(ValueFactory& vf, AluGroup& group)
assert(nsrc * m_alu_slots == m_src.size());
for (int s = 0; s < m_alu_slots; ++s) {
PVirtualValue src[3];
std::array<PVirtualValue, 3> src;
auto ireg = m_src.begin() + s * nsrc;
for (unsigned i = 0; i < nsrc; ++i, ++ireg)
@@ -886,7 +886,7 @@ AluInstr::split(ValueFactory& vf, AluGroup& group)
AluBankSwizzle bs = alu_vec_012;
while (bs != alu_vec_unknown) {
AluReadportReservation rpr = rr;
if (rpr.schedule_vec_src(src, nsrc, bs)) {
if (rpr.schedule_vec_src(src, nsrc, bs) == nsrc) {
rr = rpr;
break;
}
@@ -327,16 +327,19 @@ bool AluGroup::replace_source(PRegister old_src, PVirtualValue new_src)
auto& srcs = m_slots[slot]->sources();
PVirtualValue test_src[3];
std::transform(srcs.begin(), srcs.end(), test_src,
std::array<PVirtualValue, 3> test_src;
std::transform(srcs.begin(),
srcs.end(),
test_src.begin(),
[old_src, new_src](PVirtualValue s) {
return old_src->equal_to(*s) ? new_src : s;
});
return old_src->equal_to(*s) ? new_src : s;
});
AluBankSwizzle bs = alu_vec_012;
while (bs != alu_vec_unknown) {
AluReadportReservation rpr = rpr_sum;
if (rpr.schedule_vec_src(test_src,srcs.size(), bs)) {
unsigned nsrc = srcs.size();
if (rpr.schedule_vec_src(test_src, nsrc, bs) == nsrc) {
rpr_sum = rpr;
break;
}