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intel/compiler: Ray query requires write-back register

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Bspec 57508: Structure_SIMD16TraceRayMessage:: RayQuery Enable

   "When this bit is set in the header, Trace Ray Message behaves like a
   Ray Query. This message requires a write-back message indicating
   RayQuery for all valid Rays (SIMD lanes) have completed."

If we don't pass the write-back register, somehow it was stepping on
over R0 register and can mess up the scratch space accesses which could
potentially lead to GPU hang. It can be noticed while running it under
simulator trace.

send.rta (16|M0)         null     r124  r126:1  0x0            0x02000100           {$15} // wr:1+1, rd:0; simd16 trace ray
R0 = 00000001 00000000 00000000 00000001 00000000 00000000 00000001 00000000 00000000 00000001 00000000 00000000 00000001 00000000 00000000 00000001

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Suggested-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30600>
This commit is contained in:
Sagar Ghuge
2024-08-09 22:59:59 -07:00
committed by Marge Bot
parent 13a427a153
commit c3c62e493f
1 changed files with 12 additions and 2 deletions
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src/intel/compiler/brw_fs_nir.cpp
+12 -2
View File
@@ -8106,8 +8106,18 @@ fs_nir_emit_intrinsic(nir_to_brw_state &ntb,
srcs[RT_LOGICAL_SRC_BVH_LEVEL] = get_nir_src(ntb, instr->src[1]);
srcs[RT_LOGICAL_SRC_TRACE_RAY_CONTROL] = get_nir_src(ntb, instr->src[2]);
srcs[RT_LOGICAL_SRC_SYNCHRONOUS] = brw_imm_ud(synchronous);
bld.emit(RT_OPCODE_TRACE_RAY_LOGICAL, bld.null_reg_ud(),
srcs, RT_LOGICAL_NUM_SRCS);
/* Bspec 57508: Structure_SIMD16TraceRayMessage:: RayQuery Enable
*
* "When this bit is set in the header, Trace Ray Message behaves like
* a Ray Query. This message requires a write-back message indicating
* RayQuery for all valid Rays (SIMD lanes) have completed."
*/
brw_reg dst = (devinfo->ver >= 20 && synchronous) ?
bld.vgrf(BRW_TYPE_UD) :
bld.null_reg_ud();
bld.emit(RT_OPCODE_TRACE_RAY_LOGICAL, dst, srcs, RT_LOGICAL_NUM_SRCS);
/* There is no actual value to use in the destination register of the
* synchronous trace instruction. All of the communication with the HW