pan/mdg: Precompute mir_special_index
Rather than O(N) each call, we can precompute the whole set - also O(N) - and then subsequent checks are O(1). Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5123>
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@@ -481,7 +481,6 @@ void mir_rewrite_index_dst_single(midgard_instruction *ins, unsigned old, unsign
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void mir_rewrite_index_src_single(midgard_instruction *ins, unsigned old, unsigned new);
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void mir_rewrite_index_src_swizzle(compiler_context *ctx, unsigned old, unsigned new, unsigned *swizzle);
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bool mir_single_use(compiler_context *ctx, unsigned value);
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bool mir_special_index(compiler_context *ctx, unsigned idx);
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unsigned mir_use_count(compiler_context *ctx, unsigned value);
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uint16_t mir_bytemask_of_read_components(midgard_instruction *ins, unsigned node);
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uint16_t mir_bytemask_of_read_components_index(midgard_instruction *ins, unsigned i);
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@@ -176,27 +176,6 @@ mir_nontrivial_outmod(midgard_instruction *ins)
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return mod != midgard_outmod_none;
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}
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/* Checks if an index will be used as a special register -- basically, if we're
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* used as the input to a non-ALU op */
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bool
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mir_special_index(compiler_context *ctx, unsigned idx)
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{
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mir_foreach_instr_global(ctx, ins) {
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bool is_ldst = ins->type == TAG_LOAD_STORE_4;
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bool is_tex = ins->type == TAG_TEXTURE_4;
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bool is_writeout = ins->compact_branch && ins->writeout;
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if (!(is_ldst || is_tex || is_writeout))
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continue;
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if (mir_has_arg(ins, idx))
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return true;
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}
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return false;
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}
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/* Grabs the type size. */
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midgard_reg_mode
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@@ -127,12 +127,46 @@ mir_work_heuristic(compiler_context *ctx)
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return 8;
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}
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/* Bitset of indices that will be used as a special register -- inputs to a
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* non-ALU op. We precompute this set so that testing is efficient, otherwise
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* we end up O(mn) behaviour for n instructions and m uniform reads */
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static BITSET_WORD *
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mir_special_indices(compiler_context *ctx)
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{
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mir_compute_temp_count(ctx);
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BITSET_WORD *bset = calloc(BITSET_WORDS(ctx->temp_count), sizeof(BITSET_WORD));
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mir_foreach_instr_global(ctx, ins) {
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/* Look for special instructions */
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bool is_ldst = ins->type == TAG_LOAD_STORE_4;
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bool is_tex = ins->type == TAG_TEXTURE_4;
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bool is_writeout = ins->compact_branch && ins->writeout;
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if (!(is_ldst || is_tex || is_writeout))
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continue;
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/* Anything read by a special instruction is itself special */
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mir_foreach_src(ins, i) {
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unsigned idx = ins->src[i];
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if (idx < ctx->temp_count)
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BITSET_SET(bset, idx);
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}
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}
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return bset;
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}
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void
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midgard_promote_uniforms(compiler_context *ctx)
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{
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unsigned work_count = mir_work_heuristic(ctx);
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unsigned promoted_count = 24 - work_count;
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/* First, figure out special indices a priori so we don't recompute a lot */
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BITSET_WORD *special = mir_special_indices(ctx);
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mir_foreach_instr_global_safe(ctx, ins) {
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if (!mir_is_promoteable_ubo(ins)) continue;
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@@ -153,7 +187,9 @@ midgard_promote_uniforms(compiler_context *ctx)
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* we're being fed into a special class */
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bool needs_move = ins->dest & PAN_IS_REG;
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needs_move |= mir_special_index(ctx, ins->dest);
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if (ins->dest < ctx->temp_count)
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needs_move |= BITSET_TEST(special, ins->dest);
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if (needs_move) {
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midgard_instruction mov = v_mov(promoted, ins->dest);
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@@ -170,4 +206,6 @@ midgard_promote_uniforms(compiler_context *ctx)
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mir_remove_instruction(ins);
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}
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free(special);
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}
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