amd/common/gfx10: pad shader buffers for instruction prefetch
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
This commit is contained in:
committed by
Marek Olšák
parent
227c29a80d
commit
c067aaa580
@@ -438,6 +438,25 @@ bool ac_rtld_open(struct ac_rtld_binary *binary,
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binary->rx_size += rx_size;
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if (i.info->chip_class >= GFX10) {
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/* In gfx10, the SQ fetches up to 3 cache lines of 16 dwords
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* ahead of the PC, configurable by SH_MEM_CONFIG and
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* S_INST_PREFETCH. This can cause two issues:
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*
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* (1) Crossing a page boundary to an unmapped page. The logic
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* does not distinguish between a required fetch and a "mere"
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* prefetch and will fault.
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*
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* (2) Prefetching instructions that will be changed for a
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* different shader.
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*
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* (2) is not currently an issue because we flush the I$ at IB
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* boundaries, but (1) needs to be addressed. Due to buffer
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* suballocation, we just play it safe.
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*/
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binary->rx_size = align(binary->rx_size + 3 * 64, 64);
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}
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return true;
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#undef report_if
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