radeon/llvm: Expand UDIV and UREM nodes
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@@ -33,8 +33,10 @@ AMDGPUTargetLowering::AMDGPUTargetLowering(TargetMachine &TM) :
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setOperationAction(ISD::FEXP2, MVT::f32, Legal);
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setOperationAction(ISD::FRINT, MVT::f32, Legal);
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setOperationAction(ISD::UDIV, MVT::i32, Custom);
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setOperationAction(ISD::UDIV, MVT::i32, Expand);
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setOperationAction(ISD::UDIVREM, MVT::i32, Custom);
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setOperationAction(ISD::UREM, MVT::i32, Expand);
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}
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SDValue AMDGPUTargetLowering::LowerOperation(SDValue Op, SelectionDAG &DAG)
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@@ -44,9 +46,6 @@ SDValue AMDGPUTargetLowering::LowerOperation(SDValue Op, SelectionDAG &DAG)
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default: return AMDILTargetLowering::LowerOperation(Op, DAG);
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case ISD::INTRINSIC_WO_CHAIN: return LowerINTRINSIC_WO_CHAIN(Op, DAG);
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case ISD::SELECT_CC: return LowerSELECT_CC(Op, DAG);
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case ISD::UDIV:
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return DAG.getNode(ISD::UDIVREM, Op.getDebugLoc(), Op.getValueType(),
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Op.getOperand(0), Op.getOperand(1)).getValue(0);
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case ISD::UDIVREM: return LowerUDIVREM(Op, DAG);
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}
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}
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