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radeonsi: correct si_vgt_param_key on big endian machines

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Using mesa OpenCL failed on a big endian PowerPC machine because
si_vgt_param_key is using bitfields and a 32 bit int for an
index into an array.

Fix si_vgt_param_key to work correctly on both little endian
and big endian machines.

Signed-off-by: Bas Vermeulen <bas@daedalean.ai>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
This commit is contained in:
Bas Vermeulen
2018-04-09 13:06:00 +02:00
committed by Marek Olšák
parent f33e4482b3
commit be628e4749
1 changed files with 13 additions and 0 deletions
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src/gallium/drivers/radeonsi/si_pipe.h
+13
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@@ -464,6 +464,7 @@ struct si_shader_ctx_state {
*/
union si_vgt_param_key {
struct {
#ifdef PIPE_ARCH_LITTLE_ENDIAN
unsigned prim:4;
unsigned uses_instancing:1;
unsigned multi_instances_smaller_than_primgroup:1;
@@ -474,6 +475,18 @@ union si_vgt_param_key {
unsigned tess_uses_prim_id:1;
unsigned uses_gs:1;
unsigned _pad:32 - SI_NUM_VGT_PARAM_KEY_BITS;
#else /* PIPE_ARCH_BIG_ENDIAN */
unsigned _pad:32 - SI_NUM_VGT_PARAM_KEY_BITS;
unsigned uses_gs:1;
unsigned tess_uses_prim_id:1;
unsigned uses_tess:1;
unsigned line_stipple_enabled:1;
unsigned count_from_stream_output:1;
unsigned primitive_restart:1;
unsigned multi_instances_smaller_than_primgroup:1;
unsigned uses_instancing:1;
unsigned prim:4;
#endif
} u;
uint32_t index;
};