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anv/pipeline: Unify gen7/8 emit_ds_state

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Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Cc: "12.0" <mesa-stable@lists.freedesktop.org>
This commit is contained in:
Jason Ekstrand
2016-05-31 22:19:53 -07:00
parent fdc3c5dd05
commit bc7f7e1953
3 changed files with 60 additions and 85 deletions
Download Patch File Download Diff File Expand all files Collapse all files
src/intel/vulkan/gen7_pipeline.c
+1 -36
View File
@@ -75,41 +75,6 @@ gen7_emit_rs_state(struct anv_pipeline *pipeline,
GENX(3DSTATE_SF_pack)(NULL, &pipeline->gen7.sf, &sf);
}
static void
gen7_emit_ds_state(struct anv_pipeline *pipeline,
const VkPipelineDepthStencilStateCreateInfo *info)
{
if (info == NULL) {
/* We're going to OR this together with the dynamic state. We need
* to make sure it's initialized to something useful.
*/
memset(pipeline->gen7.depth_stencil_state, 0,
sizeof(pipeline->gen7.depth_stencil_state));
return;
}
struct GENX(DEPTH_STENCIL_STATE) state = {
.DepthTestEnable = info->depthTestEnable,
.DepthBufferWriteEnable = info->depthWriteEnable,
.DepthTestFunction = vk_to_gen_compare_op[info->depthCompareOp],
.DoubleSidedStencilEnable = true,
.StencilTestEnable = info->stencilTestEnable,
.StencilBufferWriteEnable = info->stencilTestEnable,
.StencilFailOp = vk_to_gen_stencil_op[info->front.failOp],
.StencilPassDepthPassOp = vk_to_gen_stencil_op[info->front.passOp],
.StencilPassDepthFailOp = vk_to_gen_stencil_op[info->front.depthFailOp],
.StencilTestFunction = vk_to_gen_compare_op[info->front.compareOp],
.BackfaceStencilFailOp = vk_to_gen_stencil_op[info->back.failOp],
.BackfaceStencilPassDepthPassOp = vk_to_gen_stencil_op[info->back.passOp],
.BackfaceStencilPassDepthFailOp = vk_to_gen_stencil_op[info->back.depthFailOp],
.BackfaceStencilTestFunction = vk_to_gen_compare_op[info->back.compareOp],
};
GENX(DEPTH_STENCIL_STATE_pack)(NULL, &pipeline->gen7.depth_stencil_state, &state);
}
static void
gen7_emit_cb_state(struct anv_pipeline *pipeline,
const VkPipelineColorBlendStateCreateInfo *info,
@@ -213,7 +178,7 @@ genX(graphics_pipeline_create)(
assert(pCreateInfo->pRasterizationState);
gen7_emit_rs_state(pipeline, pCreateInfo->pRasterizationState, extra);
gen7_emit_ds_state(pipeline, pCreateInfo->pDepthStencilState);
emit_ds_state(pipeline, pCreateInfo->pDepthStencilState);
gen7_emit_cb_state(pipeline, pCreateInfo->pColorBlendState,
pCreateInfo->pMultisampleState);
src/intel/vulkan/gen8_pipeline.c
-49
View File
@@ -215,55 +215,6 @@ emit_cb_state(struct anv_pipeline *pipeline,
}
}
static void
emit_ds_state(struct anv_pipeline *pipeline,
const VkPipelineDepthStencilStateCreateInfo *info)
{
uint32_t *dw = GEN_GEN == 8 ?
pipeline->gen8.wm_depth_stencil : pipeline->gen9.wm_depth_stencil;
if (info == NULL) {
/* We're going to OR this together with the dynamic state. We need
* to make sure it's initialized to something useful.
*/
memset(pipeline->gen8.wm_depth_stencil, 0,
sizeof(pipeline->gen8.wm_depth_stencil));
memset(pipeline->gen9.wm_depth_stencil, 0,
sizeof(pipeline->gen9.wm_depth_stencil));
return;
}
/* VkBool32 depthBoundsTestEnable; // optional (depth_bounds_test) */
struct GENX(3DSTATE_WM_DEPTH_STENCIL) wm_depth_stencil = {
.DepthTestEnable = info->depthTestEnable,
.DepthBufferWriteEnable = info->depthWriteEnable,
.DepthTestFunction = vk_to_gen_compare_op[info->depthCompareOp],
.DoubleSidedStencilEnable = true,
.StencilTestEnable = info->stencilTestEnable,
.StencilBufferWriteEnable = info->stencilTestEnable,
.StencilFailOp = vk_to_gen_stencil_op[info->front.failOp],
.StencilPassDepthPassOp = vk_to_gen_stencil_op[info->front.passOp],
.StencilPassDepthFailOp = vk_to_gen_stencil_op[info->front.depthFailOp],
.StencilTestFunction = vk_to_gen_compare_op[info->front.compareOp],
.BackfaceStencilFailOp = vk_to_gen_stencil_op[info->back.failOp],
.BackfaceStencilPassDepthPassOp = vk_to_gen_stencil_op[info->back.passOp],
.BackfaceStencilPassDepthFailOp =vk_to_gen_stencil_op[info->back.depthFailOp],
.BackfaceStencilTestFunction = vk_to_gen_compare_op[info->back.compareOp],
};
/* From the Broadwell PRM:
*
* "If Depth_Test_Enable = 1 AND Depth_Test_func = EQUAL, the
* Depth_Write_Enable must be set to 0."
*/
if (info->depthTestEnable && info->depthCompareOp == VK_COMPARE_OP_EQUAL)
wm_depth_stencil.DepthBufferWriteEnable = false;
GENX(3DSTATE_WM_DEPTH_STENCIL_pack)(NULL, dw, &wm_depth_stencil);
}
static void
emit_ms_state(struct anv_pipeline *pipeline,
const VkPipelineMultisampleStateCreateInfo *info)
src/intel/vulkan/genX_pipeline_util.h
+59
View File
@@ -425,3 +425,62 @@ static const uint32_t vk_to_gen_stencil_op[] = {
[VK_STENCIL_OP_INCREMENT_AND_WRAP] = STENCILOP_INCR,
[VK_STENCIL_OP_DECREMENT_AND_WRAP] = STENCILOP_DECR,
};
static void
emit_ds_state(struct anv_pipeline *pipeline,
const VkPipelineDepthStencilStateCreateInfo *info)
{
#if GEN_GEN == 7
# define depth_stencil_dw pipeline->gen7.depth_stencil_state
#elif GEN_GEN == 8
# define depth_stencil_dw pipeline->gen8.wm_depth_stencil
#else
# define depth_stencil_dw pipeline->gen9.wm_depth_stencil
#endif
if (info == NULL) {
/* We're going to OR this together with the dynamic state. We need
* to make sure it's initialized to something useful.
*/
memset(depth_stencil_dw, 0, sizeof(depth_stencil_dw));
return;
}
/* VkBool32 depthBoundsTestEnable; // optional (depth_bounds_test) */
#if GEN_GEN <= 7
struct GENX(DEPTH_STENCIL_STATE) depth_stencil = {
#else
struct GENX(3DSTATE_WM_DEPTH_STENCIL) depth_stencil = {
#endif
.DepthTestEnable = info->depthTestEnable,
.DepthBufferWriteEnable = info->depthWriteEnable,
.DepthTestFunction = vk_to_gen_compare_op[info->depthCompareOp],
.DoubleSidedStencilEnable = true,
.StencilTestEnable = info->stencilTestEnable,
.StencilBufferWriteEnable = info->stencilTestEnable,
.StencilFailOp = vk_to_gen_stencil_op[info->front.failOp],
.StencilPassDepthPassOp = vk_to_gen_stencil_op[info->front.passOp],
.StencilPassDepthFailOp = vk_to_gen_stencil_op[info->front.depthFailOp],
.StencilTestFunction = vk_to_gen_compare_op[info->front.compareOp],
.BackfaceStencilFailOp = vk_to_gen_stencil_op[info->back.failOp],
.BackfaceStencilPassDepthPassOp = vk_to_gen_stencil_op[info->back.passOp],
.BackfaceStencilPassDepthFailOp =vk_to_gen_stencil_op[info->back.depthFailOp],
.BackfaceStencilTestFunction = vk_to_gen_compare_op[info->back.compareOp],
};
/* From the Broadwell PRM:
*
* "If Depth_Test_Enable = 1 AND Depth_Test_func = EQUAL, the
* Depth_Write_Enable must be set to 0."
*/
if (info->depthTestEnable && info->depthCompareOp == VK_COMPARE_OP_EQUAL)
depth_stencil.DepthBufferWriteEnable = false;
#if GEN_GEN <= 7
GENX(DEPTH_STENCIL_STATE_pack)(NULL, depth_stencil_dw, &depth_stencil);
#else
GENX(3DSTATE_WM_DEPTH_STENCIL_pack)(NULL, depth_stencil_dw, &depth_stencil);
#endif
}