AlexIndustrial/mesa
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

iris: Add FLUSH_HDC to PIPE_CONTROL_CACHE_FLUSH_BITS

Browse Source 
This is considered a bottom-of-pipe flush bit.

Fixes: a969ad1ddf ("iris: Demote DC flush to HDC flush in cache tracker")
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16565>
This commit is contained in:
Kenneth Graunke
2022-04-13 22:59:12 -07:00
committed by Marge Bot
parent 3ddda935b1
commit b8799a499e
1 changed files with 1 additions and 0 deletions
Download Patch File Download Diff File Expand all files Collapse all files
src/gallium/drivers/iris/iris_context.h
+1
View File
@@ -350,6 +350,7 @@ enum pipe_control_flags
(PIPE_CONTROL_DEPTH_CACHE_FLUSH | \
PIPE_CONTROL_DATA_CACHE_FLUSH | \
PIPE_CONTROL_TILE_CACHE_FLUSH | \
PIPE_CONTROL_FLUSH_HDC | \
PIPE_CONTROL_RENDER_TARGET_FLUSH)
#define PIPE_CONTROL_CACHE_INVALIDATE_BITS \