ws/i965: clone the i915 winsys
I'll want to rework this, not sure trying to share this code is a very good idea at least until the interfaces from the two drivers calm down.
This commit is contained in:
Keith Whitwell
@@ -0,0 +1,16 @@
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TOP = ../../../../../..
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include $(TOP)/configs/current
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LIBNAME = inteldrm
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C_SOURCES = \
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intel_drm_batchbuffer.c \
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intel_drm_buffer.c \
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intel_drm_fence.c \
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intel_drm_api.c
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LIBRARY_INCLUDES = $(shell pkg-config libdrm --cflags-only-I)
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LIBRARY_DEFINES = $(shell pkg-config libdrm --cflags-only-other)
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include ../../../../Makefile.template
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@@ -0,0 +1,17 @@
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Import('*')
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env = drienv.Clone()
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inteldrm_sources = [
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'intel_drm_api.c',
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'intel_drm_batchbuffer.c',
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'intel_drm_buffer.c',
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'intel_drm_fence.c',
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]
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inteldrm = env.ConvenienceLibrary(
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target ='inteldrm',
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source = inteldrm_sources,
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)
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Export('inteldrm')
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@@ -0,0 +1,209 @@
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#include "state_tracker/drm_api.h"
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#include "intel_drm_winsys.h"
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#include "util/u_memory.h"
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#include "i915/i915_context.h"
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#include "i915/i915_screen.h"
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#include "trace/tr_drm.h"
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/*
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* Helper functions
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*/
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static void
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intel_drm_get_device_id(unsigned int *device_id)
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{
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char path[512];
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FILE *file;
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void *shutup_gcc;
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/*
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* FIXME: Fix this up to use a drm ioctl or whatever.
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*/
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snprintf(path, sizeof(path), "/sys/class/drm/card0/device/device");
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file = fopen(path, "r");
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if (!file) {
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return;
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}
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shutup_gcc = fgets(path, sizeof(path), file);
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sscanf(path, "%x", device_id);
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fclose(file);
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}
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static struct intel_buffer *
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intel_drm_buffer_from_handle(struct intel_drm_winsys *idws,
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const char* name, unsigned handle)
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{
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struct intel_drm_buffer *buf = CALLOC_STRUCT(intel_drm_buffer);
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uint32_t tile = 0, swizzle = 0;
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if (!buf)
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return NULL;
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buf->magic = 0xDEAD1337;
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buf->bo = drm_intel_bo_gem_create_from_name(idws->pools.gem, name, handle);
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buf->flinked = TRUE;
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buf->flink = handle;
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if (!buf->bo)
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goto err;
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drm_intel_bo_get_tiling(buf->bo, &tile, &swizzle);
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if (tile != INTEL_TILE_NONE)
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buf->map_gtt = TRUE;
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return (struct intel_buffer *)buf;
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err:
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FREE(buf);
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return NULL;
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}
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/*
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* Exported functions
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*/
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static struct pipe_texture *
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intel_drm_texture_from_shared_handle(struct drm_api *api,
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struct pipe_screen *screen,
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struct pipe_texture *templ,
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const char* name,
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unsigned pitch,
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unsigned handle)
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{
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struct intel_drm_winsys *idws = intel_drm_winsys(i915_screen(screen)->iws);
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struct intel_buffer *buffer;
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buffer = intel_drm_buffer_from_handle(idws, name, handle);
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if (!buffer)
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return NULL;
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return i915_texture_blanket_intel(screen, templ, pitch, buffer);
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}
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static boolean
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intel_drm_shared_handle_from_texture(struct drm_api *api,
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struct pipe_screen *screen,
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struct pipe_texture *texture,
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unsigned *pitch,
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unsigned *handle)
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{
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struct intel_drm_buffer *buf = NULL;
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struct intel_buffer *buffer = NULL;
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if (!i915_get_texture_buffer_intel(texture, &buffer, pitch))
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return FALSE;
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buf = intel_drm_buffer(buffer);
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if (!buf->flinked) {
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if (drm_intel_bo_flink(buf->bo, &buf->flink))
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return FALSE;
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buf->flinked = TRUE;
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}
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*handle = buf->flink;
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return TRUE;
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}
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static boolean
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intel_drm_local_handle_from_texture(struct drm_api *api,
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struct pipe_screen *screen,
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struct pipe_texture *texture,
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unsigned *pitch,
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unsigned *handle)
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{
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struct intel_buffer *buffer = NULL;
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if (!i915_get_texture_buffer_intel(texture, &buffer, pitch))
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return FALSE;
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*handle = intel_drm_buffer(buffer)->bo->handle;
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return TRUE;
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}
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static void
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intel_drm_winsys_destroy(struct intel_winsys *iws)
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{
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struct intel_drm_winsys *idws = intel_drm_winsys(iws);
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drm_intel_bufmgr_destroy(idws->pools.gem);
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FREE(idws);
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}
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static struct pipe_screen *
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intel_drm_create_screen(struct drm_api *api, int drmFD,
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struct drm_create_screen_arg *arg)
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{
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struct intel_drm_winsys *idws;
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unsigned int deviceID;
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if (arg != NULL) {
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switch(arg->mode) {
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case DRM_CREATE_NORMAL:
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break;
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default:
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return NULL;
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}
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}
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idws = CALLOC_STRUCT(intel_drm_winsys);
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if (!idws)
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return NULL;
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intel_drm_get_device_id(&deviceID);
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intel_drm_winsys_init_batchbuffer_functions(idws);
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intel_drm_winsys_init_buffer_functions(idws);
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intel_drm_winsys_init_fence_functions(idws);
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idws->fd = drmFD;
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idws->id = deviceID;
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idws->max_batch_size = 16 * 4096;
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idws->base.destroy = intel_drm_winsys_destroy;
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idws->pools.gem = drm_intel_bufmgr_gem_init(idws->fd, idws->max_batch_size);
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drm_intel_bufmgr_gem_enable_reuse(idws->pools.gem);
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idws->softpipe = FALSE;
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idws->dump_cmd = debug_get_bool_option("INTEL_DUMP_CMD", FALSE);
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return i915_create_screen(&idws->base, deviceID);
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}
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static struct pipe_context *
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intel_drm_create_context(struct drm_api *api, struct pipe_screen *screen)
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{
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return i915_create_context(screen);
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}
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static void
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destroy(struct drm_api *api)
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{
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}
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struct drm_api intel_drm_api =
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{
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.create_context = intel_drm_create_context,
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.create_screen = intel_drm_create_screen,
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.texture_from_shared_handle = intel_drm_texture_from_shared_handle,
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.shared_handle_from_texture = intel_drm_shared_handle_from_texture,
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.local_handle_from_texture = intel_drm_local_handle_from_texture,
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.destroy = destroy,
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};
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struct drm_api *
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drm_api_create()
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{
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return trace_drm_create(&intel_drm_api);
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}
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@@ -0,0 +1,244 @@
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#include "intel_drm_winsys.h"
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#include "util/u_memory.h"
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#include "i915_drm.h"
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#define BATCH_RESERVED 16
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#define INTEL_DEFAULT_RELOCS 100
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#define INTEL_MAX_RELOCS 400
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#define INTEL_BATCH_NO_CLIPRECTS 0x1
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#define INTEL_BATCH_CLIPRECTS 0x2
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#undef INTEL_RUN_SYNC
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#undef INTEL_MAP_BATCHBUFFER
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#undef INTEL_MAP_GTT
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#define INTEL_ALWAYS_FLUSH
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struct intel_drm_batchbuffer
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{
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struct intel_batchbuffer base;
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size_t actual_size;
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drm_intel_bo *bo;
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};
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static INLINE struct intel_drm_batchbuffer *
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intel_drm_batchbuffer(struct intel_batchbuffer *batch)
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{
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return (struct intel_drm_batchbuffer *)batch;
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}
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static void
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intel_drm_batchbuffer_reset(struct intel_drm_batchbuffer *batch)
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{
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struct intel_drm_winsys *idws = intel_drm_winsys(batch->base.iws);
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int ret;
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if (batch->bo)
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drm_intel_bo_unreference(batch->bo);
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batch->bo = drm_intel_bo_alloc(idws->pools.gem,
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"gallium3d_batchbuffer",
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batch->actual_size,
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4096);
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#ifdef INTEL_MAP_BATCHBUFFER
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#ifdef INTEL_MAP_GTT
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ret = drm_intel_gem_bo_map_gtt(batch->bo);
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#else
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ret = drm_intel_bo_map(batch->bo, TRUE);
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#endif
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assert(ret == 0);
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batch->base.map = batch->bo->virtual;
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#else
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(void)ret;
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#endif
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memset(batch->base.map, 0, batch->actual_size);
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batch->base.ptr = batch->base.map;
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batch->base.size = batch->actual_size - BATCH_RESERVED;
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batch->base.relocs = 0;
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}
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static struct intel_batchbuffer *
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intel_drm_batchbuffer_create(struct intel_winsys *iws)
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{
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struct intel_drm_winsys *idws = intel_drm_winsys(iws);
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struct intel_drm_batchbuffer *batch = CALLOC_STRUCT(intel_drm_batchbuffer);
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batch->actual_size = idws->max_batch_size;
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#ifdef INTEL_MAP_BATCHBUFFER
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batch->base.map = NULL;
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#else
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batch->base.map = MALLOC(batch->actual_size);
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#endif
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batch->base.ptr = NULL;
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batch->base.size = 0;
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batch->base.relocs = 0;
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batch->base.max_relocs = 300;/*INTEL_DEFAULT_RELOCS;*/
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batch->base.iws = iws;
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intel_drm_batchbuffer_reset(batch);
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return &batch->base;
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}
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static int
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intel_drm_batchbuffer_reloc(struct intel_batchbuffer *ibatch,
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struct intel_buffer *buffer,
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enum intel_buffer_usage usage,
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unsigned pre_add)
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{
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struct intel_drm_batchbuffer *batch = intel_drm_batchbuffer(ibatch);
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unsigned write_domain = 0;
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unsigned read_domain = 0;
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unsigned offset;
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int ret = 0;
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assert(batch->base.relocs < batch->base.max_relocs);
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if (usage == INTEL_USAGE_SAMPLER) {
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write_domain = 0;
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read_domain = I915_GEM_DOMAIN_SAMPLER;
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} else if (usage == INTEL_USAGE_RENDER) {
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write_domain = I915_GEM_DOMAIN_RENDER;
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read_domain = I915_GEM_DOMAIN_RENDER;
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} else if (usage == INTEL_USAGE_2D_TARGET) {
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write_domain = I915_GEM_DOMAIN_RENDER;
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read_domain = I915_GEM_DOMAIN_RENDER;
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} else if (usage == INTEL_USAGE_2D_SOURCE) {
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write_domain = 0;
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read_domain = I915_GEM_DOMAIN_RENDER;
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} else if (usage == INTEL_USAGE_VERTEX) {
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write_domain = 0;
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read_domain = I915_GEM_DOMAIN_VERTEX;
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} else {
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assert(0);
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return -1;
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}
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offset = (unsigned)(batch->base.ptr - batch->base.map);
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ret = drm_intel_bo_emit_reloc(batch->bo, offset,
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intel_bo(buffer), pre_add,
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read_domain,
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write_domain);
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((uint32_t*)batch->base.ptr)[0] = intel_bo(buffer)->offset + pre_add;
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batch->base.ptr += 4;
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if (!ret)
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batch->base.relocs++;
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return ret;
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}
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static void
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intel_drm_batchbuffer_flush(struct intel_batchbuffer *ibatch,
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struct pipe_fence_handle **fence)
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{
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struct intel_drm_batchbuffer *batch = intel_drm_batchbuffer(ibatch);
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unsigned used = 0;
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int ret = 0;
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int i;
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assert(intel_batchbuffer_space(ibatch) >= 0);
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used = batch->base.ptr - batch->base.map;
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assert((used & 3) == 0);
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#ifdef INTEL_ALWAYS_FLUSH
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/* MI_FLUSH | FLUSH_MAP_CACHE */
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intel_batchbuffer_dword(ibatch, (0x4<<23)|(1<<0));
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used += 4;
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#endif
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if ((used & 4) == 0) {
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/* MI_NOOP */
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intel_batchbuffer_dword(ibatch, 0);
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}
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/* MI_BATCH_BUFFER_END */
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intel_batchbuffer_dword(ibatch, (0xA<<23));
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used = batch->base.ptr - batch->base.map;
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assert((used & 4) == 0);
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#ifdef INTEL_MAP_BATCHBUFFER
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#ifdef INTEL_MAP_GTT
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drm_intel_gem_bo_unmap_gtt(batch->bo);
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#else
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drm_intel_bo_unmap(batch->bo);
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#endif
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#else
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drm_intel_bo_subdata(batch->bo, 0, used, batch->base.map);
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#endif
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|
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/* Do the sending to HW */
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ret = drm_intel_bo_exec(batch->bo, used, NULL, 0, 0);
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assert(ret == 0);
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|
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if (intel_drm_winsys(ibatch->iws)->dump_cmd) {
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unsigned *ptr;
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drm_intel_bo_map(batch->bo, FALSE);
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ptr = (unsigned*)batch->bo->virtual;
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debug_printf("%s:\n", __func__);
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for (i = 0; i < used / 4; i++, ptr++) {
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debug_printf("\t%08x: %08x\n", i*4, *ptr);
|
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}
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drm_intel_bo_unmap(batch->bo);
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} else {
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#ifdef INTEL_RUN_SYNC
|
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drm_intel_bo_map(batch->bo, FALSE);
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drm_intel_bo_unmap(batch->bo);
|
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#endif
|
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}
|
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|
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if (fence) {
|
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ibatch->iws->fence_reference(ibatch->iws, fence, NULL);
|
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|
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#ifdef INTEL_RUN_SYNC
|
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/* we run synced to GPU so just pass null */
|
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(*fence) = intel_drm_fence_create(NULL);
|
||||
#else
|
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(*fence) = intel_drm_fence_create(batch->bo);
|
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#endif
|
||||
}
|
||||
|
||||
intel_drm_batchbuffer_reset(batch);
|
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}
|
||||
|
||||
static void
|
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intel_drm_batchbuffer_destroy(struct intel_batchbuffer *ibatch)
|
||||
{
|
||||
struct intel_drm_batchbuffer *batch = intel_drm_batchbuffer(ibatch);
|
||||
|
||||
if (batch->bo)
|
||||
drm_intel_bo_unreference(batch->bo);
|
||||
|
||||
#ifndef INTEL_MAP_BATCHBUFFER
|
||||
FREE(batch->base.map);
|
||||
#endif
|
||||
FREE(batch);
|
||||
}
|
||||
|
||||
void intel_drm_winsys_init_batchbuffer_functions(struct intel_drm_winsys *idws)
|
||||
{
|
||||
idws->base.batchbuffer_create = intel_drm_batchbuffer_create;
|
||||
idws->base.batchbuffer_reloc = intel_drm_batchbuffer_reloc;
|
||||
idws->base.batchbuffer_flush = intel_drm_batchbuffer_flush;
|
||||
idws->base.batchbuffer_destroy = intel_drm_batchbuffer_destroy;
|
||||
}
|
||||
@@ -0,0 +1,154 @@
|
||||
|
||||
#include "intel_drm_winsys.h"
|
||||
#include "util/u_memory.h"
|
||||
|
||||
#include "i915_drm.h"
|
||||
|
||||
static struct intel_buffer *
|
||||
intel_drm_buffer_create(struct intel_winsys *iws,
|
||||
unsigned size, unsigned alignment,
|
||||
enum intel_buffer_type type)
|
||||
{
|
||||
struct intel_drm_buffer *buf = CALLOC_STRUCT(intel_drm_buffer);
|
||||
struct intel_drm_winsys *idws = intel_drm_winsys(iws);
|
||||
drm_intel_bufmgr *pool;
|
||||
char *name;
|
||||
|
||||
if (!buf)
|
||||
return NULL;
|
||||
|
||||
buf->magic = 0xDEAD1337;
|
||||
buf->flinked = FALSE;
|
||||
buf->flink = 0;
|
||||
buf->map_gtt = FALSE;
|
||||
|
||||
if (type == INTEL_NEW_TEXTURE) {
|
||||
name = "gallium3d_texture";
|
||||
pool = idws->pools.gem;
|
||||
} else if (type == INTEL_NEW_VERTEX) {
|
||||
name = "gallium3d_vertex";
|
||||
pool = idws->pools.gem;
|
||||
buf->map_gtt = TRUE;
|
||||
} else if (type == INTEL_NEW_SCANOUT) {
|
||||
name = "gallium3d_scanout";
|
||||
pool = idws->pools.gem;
|
||||
buf->map_gtt = TRUE;
|
||||
} else {
|
||||
assert(0);
|
||||
name = "gallium3d_unknown";
|
||||
pool = idws->pools.gem;
|
||||
}
|
||||
|
||||
buf->bo = drm_intel_bo_alloc(pool, name, size, alignment);
|
||||
|
||||
if (!buf->bo)
|
||||
goto err;
|
||||
|
||||
return (struct intel_buffer *)buf;
|
||||
|
||||
err:
|
||||
assert(0);
|
||||
FREE(buf);
|
||||
return NULL;
|
||||
}
|
||||
|
||||
static int
|
||||
intel_drm_buffer_set_fence_reg(struct intel_winsys *iws,
|
||||
struct intel_buffer *buffer,
|
||||
unsigned stride,
|
||||
enum intel_buffer_tile tile)
|
||||
{
|
||||
struct intel_drm_buffer *buf = intel_drm_buffer(buffer);
|
||||
assert(I915_TILING_NONE == INTEL_TILE_NONE);
|
||||
assert(I915_TILING_X == INTEL_TILE_X);
|
||||
assert(I915_TILING_Y == INTEL_TILE_Y);
|
||||
|
||||
if (tile != INTEL_TILE_NONE) {
|
||||
assert(buf->map_count == 0);
|
||||
buf->map_gtt = TRUE;
|
||||
}
|
||||
|
||||
return drm_intel_bo_set_tiling(buf->bo, &tile, stride);
|
||||
}
|
||||
|
||||
static void *
|
||||
intel_drm_buffer_map(struct intel_winsys *iws,
|
||||
struct intel_buffer *buffer,
|
||||
boolean write)
|
||||
{
|
||||
struct intel_drm_buffer *buf = intel_drm_buffer(buffer);
|
||||
drm_intel_bo *bo = intel_bo(buffer);
|
||||
int ret = 0;
|
||||
|
||||
assert(bo);
|
||||
|
||||
if (buf->map_count)
|
||||
goto out;
|
||||
|
||||
if (buf->map_gtt)
|
||||
ret = drm_intel_gem_bo_map_gtt(bo);
|
||||
else
|
||||
ret = drm_intel_bo_map(bo, write);
|
||||
|
||||
buf->ptr = bo->virtual;
|
||||
|
||||
assert(ret == 0);
|
||||
out:
|
||||
if (ret)
|
||||
return NULL;
|
||||
|
||||
buf->map_count++;
|
||||
return buf->ptr;
|
||||
}
|
||||
|
||||
static void
|
||||
intel_drm_buffer_unmap(struct intel_winsys *iws,
|
||||
struct intel_buffer *buffer)
|
||||
{
|
||||
struct intel_drm_buffer *buf = intel_drm_buffer(buffer);
|
||||
|
||||
if (--buf->map_count)
|
||||
return;
|
||||
|
||||
if (buf->map_gtt)
|
||||
drm_intel_gem_bo_unmap_gtt(intel_bo(buffer));
|
||||
else
|
||||
drm_intel_bo_unmap(intel_bo(buffer));
|
||||
}
|
||||
|
||||
static int
|
||||
intel_drm_buffer_write(struct intel_winsys *iws,
|
||||
struct intel_buffer *buffer,
|
||||
size_t offset,
|
||||
size_t size,
|
||||
const void *data)
|
||||
{
|
||||
struct intel_drm_buffer *buf = intel_drm_buffer(buffer);
|
||||
|
||||
return drm_intel_bo_subdata(buf->bo, offset, size, (void*)data);
|
||||
}
|
||||
|
||||
static void
|
||||
intel_drm_buffer_destroy(struct intel_winsys *iws,
|
||||
struct intel_buffer *buffer)
|
||||
{
|
||||
drm_intel_bo_unreference(intel_bo(buffer));
|
||||
|
||||
#ifdef DEBUG
|
||||
intel_drm_buffer(buffer)->magic = 0;
|
||||
intel_drm_buffer(buffer)->bo = NULL;
|
||||
#endif
|
||||
|
||||
FREE(buffer);
|
||||
}
|
||||
|
||||
void
|
||||
intel_drm_winsys_init_buffer_functions(struct intel_drm_winsys *idws)
|
||||
{
|
||||
idws->base.buffer_create = intel_drm_buffer_create;
|
||||
idws->base.buffer_set_fence_reg = intel_drm_buffer_set_fence_reg;
|
||||
idws->base.buffer_map = intel_drm_buffer_map;
|
||||
idws->base.buffer_unmap = intel_drm_buffer_unmap;
|
||||
idws->base.buffer_write = intel_drm_buffer_write;
|
||||
idws->base.buffer_destroy = intel_drm_buffer_destroy;
|
||||
}
|
||||
@@ -0,0 +1,81 @@
|
||||
|
||||
#include "intel_drm_winsys.h"
|
||||
#include "util/u_memory.h"
|
||||
#include "pipe/p_refcnt.h"
|
||||
|
||||
/**
|
||||
* Because gem does not have fence's we have to create our own fences.
|
||||
*
|
||||
* They work by keeping the batchbuffer around and checking if that has
|
||||
* been idled. If bo is NULL fence has expired.
|
||||
*/
|
||||
struct intel_drm_fence
|
||||
{
|
||||
struct pipe_reference reference;
|
||||
drm_intel_bo *bo;
|
||||
};
|
||||
|
||||
|
||||
struct pipe_fence_handle *
|
||||
intel_drm_fence_create(drm_intel_bo *bo)
|
||||
{
|
||||
struct intel_drm_fence *fence = CALLOC_STRUCT(intel_drm_fence);
|
||||
|
||||
pipe_reference_init(&fence->reference, 1);
|
||||
/* bo is null if fence already expired */
|
||||
if (bo) {
|
||||
drm_intel_bo_reference(bo);
|
||||
fence->bo = bo;
|
||||
}
|
||||
|
||||
return (struct pipe_fence_handle *)fence;
|
||||
}
|
||||
|
||||
static void
|
||||
intel_drm_fence_reference(struct intel_winsys *iws,
|
||||
struct pipe_fence_handle **ptr,
|
||||
struct pipe_fence_handle *fence)
|
||||
{
|
||||
struct intel_drm_fence *old = (struct intel_drm_fence *)*ptr;
|
||||
struct intel_drm_fence *f = (struct intel_drm_fence *)fence;
|
||||
|
||||
if (pipe_reference((struct pipe_reference**)ptr, &f->reference)) {
|
||||
if (old->bo)
|
||||
drm_intel_bo_unreference(old->bo);
|
||||
FREE(old);
|
||||
}
|
||||
}
|
||||
|
||||
static int
|
||||
intel_drm_fence_signalled(struct intel_winsys *iws,
|
||||
struct pipe_fence_handle *fence)
|
||||
{
|
||||
assert(0);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int
|
||||
intel_drm_fence_finish(struct intel_winsys *iws,
|
||||
struct pipe_fence_handle *fence)
|
||||
{
|
||||
struct intel_drm_fence *f = (struct intel_drm_fence *)fence;
|
||||
|
||||
/* fence already expired */
|
||||
if (!f->bo)
|
||||
return 0;
|
||||
|
||||
drm_intel_bo_wait_rendering(f->bo);
|
||||
drm_intel_bo_unreference(f->bo);
|
||||
f->bo = NULL;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
void
|
||||
intel_drm_winsys_init_fence_functions(struct intel_drm_winsys *idws)
|
||||
{
|
||||
idws->base.fence_reference = intel_drm_fence_reference;
|
||||
idws->base.fence_signalled = intel_drm_fence_signalled;
|
||||
idws->base.fence_finish = intel_drm_fence_finish;
|
||||
}
|
||||
@@ -0,0 +1,78 @@
|
||||
|
||||
#ifndef INTEL_DRM_WINSYS_H
|
||||
#define INTEL_DRM_WINSYS_H
|
||||
|
||||
#include "i915/intel_batchbuffer.h"
|
||||
|
||||
#include "drm.h"
|
||||
#include "intel_bufmgr.h"
|
||||
|
||||
|
||||
/*
|
||||
* Winsys
|
||||
*/
|
||||
|
||||
|
||||
struct intel_drm_winsys
|
||||
{
|
||||
struct intel_winsys base;
|
||||
|
||||
boolean softpipe;
|
||||
boolean dump_cmd;
|
||||
|
||||
int fd; /**< Drm file discriptor */
|
||||
|
||||
unsigned id;
|
||||
|
||||
size_t max_batch_size;
|
||||
|
||||
struct {
|
||||
drm_intel_bufmgr *gem;
|
||||
} pools;
|
||||
};
|
||||
|
||||
static INLINE struct intel_drm_winsys *
|
||||
intel_drm_winsys(struct intel_winsys *iws)
|
||||
{
|
||||
return (struct intel_drm_winsys *)iws;
|
||||
}
|
||||
|
||||
struct intel_drm_winsys * intel_drm_winsys_create(int fd, unsigned pci_id);
|
||||
struct pipe_fence_handle * intel_drm_fence_create(drm_intel_bo *bo);
|
||||
|
||||
void intel_drm_winsys_init_batchbuffer_functions(struct intel_drm_winsys *idws);
|
||||
void intel_drm_winsys_init_buffer_functions(struct intel_drm_winsys *idws);
|
||||
void intel_drm_winsys_init_fence_functions(struct intel_drm_winsys *idws);
|
||||
|
||||
|
||||
/*
|
||||
* Buffer
|
||||
*/
|
||||
|
||||
|
||||
struct intel_drm_buffer {
|
||||
unsigned magic;
|
||||
|
||||
drm_intel_bo *bo;
|
||||
|
||||
void *ptr;
|
||||
unsigned map_count;
|
||||
boolean map_gtt;
|
||||
|
||||
boolean flinked;
|
||||
unsigned flink;
|
||||
};
|
||||
|
||||
static INLINE struct intel_drm_buffer *
|
||||
intel_drm_buffer(struct intel_buffer *buffer)
|
||||
{
|
||||
return (struct intel_drm_buffer *)buffer;
|
||||
}
|
||||
|
||||
static INLINE drm_intel_bo *
|
||||
intel_bo(struct intel_buffer *buffer)
|
||||
{
|
||||
return intel_drm_buffer(buffer)->bo;
|
||||
}
|
||||
|
||||
#endif
|
||||
Reference in New Issue
Block a user