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radeonsi: don't use PKT3_SET_SH_REG_INDEX on gfx9 and older

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Fixes: ccaaf8fe04 ("amd: massively simplify how info->spi_cu_en is applied")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8464
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21726>
This commit is contained in:
Pierre-Eric Pelloux-Prayer
2023-03-07 13:51:14 +01:00
committed by Marge Bot
parent 49913fa418
commit b75acbf88f
1 changed files with 4 additions and 2 deletions
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src/gallium/drivers/radeonsi/si_pm4.c
+4 -2
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@@ -110,8 +110,10 @@ void si_pm4_set_reg_idx3(struct si_screen *sscreen, struct si_pm4_state *state,
{
SI_CHECK_SHADOWED_REGS(reg, 1);
si_pm4_set_reg_custom(state, reg - SI_SH_REG_OFFSET, val, PKT3_SET_SH_REG_INDEX,
sscreen->info.gfx_level >= GFX10 ? 3 : 0);
if (sscreen->info.gfx_level >= GFX10)
si_pm4_set_reg_custom(state, reg - SI_SH_REG_OFFSET, val, PKT3_SET_SH_REG_INDEX, 3);
else
si_pm4_set_reg_custom(state, reg - SI_SH_REG_OFFSET, val, PKT3_SET_SH_REG, 0);
}
void si_pm4_set_reg_va(struct si_pm4_state *state, unsigned reg, uint32_t val)