pan/bi: Gate late DCE/CSE on "optimize"

Otherwise we can end up with unlowered ATOM.i32 on Valhall.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15223>
This commit is contained in:
Alyssa Rosenzweig
2022-03-23 09:22:40 -04:00
committed by Marge Bot
parent 3485b8dc78
commit b70a7c97bb
+4 -2
View File
@@ -4125,8 +4125,10 @@ bi_compile_variant_nir(nir_shader *nir,
bi_lower_fau(ctx);
/* Lowering FAU can create redundant moves. Run CSE+DCE to clean up. */
bi_opt_cse(ctx);
bi_opt_dead_code_eliminate(ctx);
if (likely(optimize)) {
bi_opt_cse(ctx);
bi_opt_dead_code_eliminate(ctx);
}
/* Analyze before register allocation to avoid false dependencies. The
* skip bit is a function of only the data flow graph and is invariant