panfrost/va: valhall-specific swizzle lowering
For most swizzled instructions that are different between valhall and bifrost, valhall allows more values than bifrost does, so we can avoid some unnecessary lowering. Signed-off-by: Benjamin Lee <benjamin.lee@collabora.com> Reviewed-by: Eric R. Smith <eric.smith@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33416>
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@@ -25,6 +25,7 @@
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#include "bi_swizzles.h"
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#include "compiler.h"
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#include "valhall.h"
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#include "panfrost/lib/pan_props.h"
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/* Not all 8-bit and 16-bit instructions support all swizzles on all sources.
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* These passes, intended to run after NIR->BIR but before scheduling/RA, lower
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@@ -46,6 +47,84 @@ bi_swizzle_replicates_8(enum bi_swizzle swz)
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}
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}
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static uint32_t
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va_op_swizzles(enum bi_opcode op, unsigned src)
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{
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/* This is a bifrost-only instruction that is lowered on valhall */
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if (!valhall_opcodes[op].exact)
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return bi_op_swizzles[op][src];
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uint32_t swizzles = 0;
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struct va_src_info info = va_src_info(op, src);
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if (info.swizzle) {
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assert(info.size == VA_SIZE_16 || info.size == VA_SIZE_32);
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if (info.size == VA_SIZE_16)
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swizzles |= (1 << BI_SWIZZLE_H00) | (1 << BI_SWIZZLE_H10) |
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(1 << BI_SWIZZLE_H01) | (1 << BI_SWIZZLE_H11);
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else if (info.size == VA_SIZE_32)
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swizzles |= (1 << BI_SWIZZLE_H01) | (1 << BI_SWIZZLE_H0) |
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(1 << BI_SWIZZLE_H1);
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}
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if (info.lane) {
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if (info.size == VA_SIZE_8)
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swizzles |= (1 << BI_SWIZZLE_B0) | (1 << BI_SWIZZLE_B1) |
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(1 << BI_SWIZZLE_B2) | (1 << BI_SWIZZLE_B3);
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if (info.size == VA_SIZE_16)
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swizzles |= (1 << BI_SWIZZLE_H0) | (1 << BI_SWIZZLE_H1);
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}
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if (info.lanes) {
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assert(info.size == VA_SIZE_8);
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swizzles |= (1 << BI_SWIZZLE_B00) | (1 << BI_SWIZZLE_B11) |
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(1 << BI_SWIZZLE_B22) | (1 << BI_SWIZZLE_B33);
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}
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if (info.halfswizzle) {
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assert(info.size == VA_SIZE_8);
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swizzles |= (1 << BI_SWIZZLE_B00) | (1 << BI_SWIZZLE_B10) |
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(1 << BI_SWIZZLE_B20) | (1 << BI_SWIZZLE_B30) |
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(1 << BI_SWIZZLE_B01) | (1 << BI_SWIZZLE_B11) |
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(1 << BI_SWIZZLE_B21) | (1 << BI_SWIZZLE_B31) |
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(1 << BI_SWIZZLE_B02) | (1 << BI_SWIZZLE_B12) |
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(1 << BI_SWIZZLE_B22) | (1 << BI_SWIZZLE_B32) |
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(1 << BI_SWIZZLE_B03) | (1 << BI_SWIZZLE_B13) |
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(1 << BI_SWIZZLE_B23) | (1 << BI_SWIZZLE_B33);
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}
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if (info.widen) {
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if (info.size == VA_SIZE_8)
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swizzles |= (1 << BI_SWIZZLE_B0123) | (1 << BI_SWIZZLE_B0101) |
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(1 << BI_SWIZZLE_B2323) | (1 << BI_SWIZZLE_B0000) |
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(1 << BI_SWIZZLE_B1111) | (1 << BI_SWIZZLE_B2222) |
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(1 << BI_SWIZZLE_B3333);
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else if (info.size == VA_SIZE_16)
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swizzles |= (1 << BI_SWIZZLE_H00) | (1 << BI_SWIZZLE_H10) |
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(1 << BI_SWIZZLE_H01) | (1 << BI_SWIZZLE_H11) |
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(1 << BI_SWIZZLE_B00) | (1 << BI_SWIZZLE_B11) |
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(1 << BI_SWIZZLE_B22) | (1 << BI_SWIZZLE_B33) |
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(1 << BI_SWIZZLE_B01) | (1 << BI_SWIZZLE_B20) |
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(1 << BI_SWIZZLE_B02) | (1 << BI_SWIZZLE_B31) |
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(1 << BI_SWIZZLE_B13) | (1 << BI_SWIZZLE_B23);
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else if (info.size == VA_SIZE_32)
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swizzles |= (1 << BI_SWIZZLE_H01) | (1 << BI_SWIZZLE_H0) |
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(1 << BI_SWIZZLE_H1) | (1 << BI_SWIZZLE_B0) |
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(1 << BI_SWIZZLE_B1) | (1 << BI_SWIZZLE_B2) |
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(1 << BI_SWIZZLE_B3);
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}
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if (info.combine) {
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assert(info.size == VA_SIZE_32);
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swizzles |= (1 << BI_SWIZZLE_H01) | (1 << BI_SWIZZLE_H0) | (1 << BI_SWIZZLE_H1);
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}
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if (swizzles == 0)
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swizzles = 1 << BI_SWIZZLE_H01;
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return swizzles;
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}
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static void
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lower_swizzle(bi_context *ctx, bi_instr *ins, unsigned src)
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{
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@@ -63,7 +142,8 @@ lower_swizzle(bi_context *ctx, bi_instr *ins, unsigned src)
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return;
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}
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uint32_t supported_swizzles = bi_op_swizzles[ins->op][src];
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uint32_t supported_swizzles = pan_arch(ctx->inputs->gpu_id) >= 9 ?
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va_op_swizzles(ins->op, src) : bi_op_swizzles[ins->op][src];
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if (supported_swizzles & (1 << ins->src[src].swizzle))
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return;
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