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freedreno/a6xx: add missing USES_GMEM flag and BIN_RENDER_END markers

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Add USES_GMEM flag to indicate that GMEM is in use, so that preemption can
know it needs save and restore GMEM contents.

The missing BIN_RENDER_END markers are also added, their purpose is to
clear the USES_GMEM flag once GMEM is no longer in use.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30544>
This commit is contained in:
Jonathan Marek
2022-12-01 16:06:49 -05:00
committed by Marge Bot
parent 72900e1aac
commit b6432a6c66
2 changed files with 20 additions and 6 deletions
Download Patch File Download Diff File Expand all files Collapse all files
src/freedreno/vulkan/tu_cmd_buffer.cc
+11 -3
View File
@@ -1003,7 +1003,8 @@ tu6_emit_tile_select(struct tu_cmd_buffer *cmd,
const struct tu_tiling_config *tiling = cmd->state.tiling;
tu_cs_emit_pkt7(cs, CP_SET_MARKER, 1);
tu_cs_emit(cs, A6XX_CP_SET_MARKER_0_MODE(RM6_BIN_RENDER_START));
tu_cs_emit(cs, A6XX_CP_SET_MARKER_0_MODE(RM6_BIN_RENDER_START) |
A6XX_CP_SET_MARKER_0_USES_GMEM);
const uint32_t x1 = tiling->tile0.width * tx;
const uint32_t y1 = tiling->tile0.height * ty;
@@ -1197,7 +1198,8 @@ tu6_emit_tile_store(struct tu_cmd_buffer *cmd, struct tu_cs *cs)
tu_cs_set_writeable(cs, true);
tu_cs_emit_pkt7(cs, CP_SET_MARKER, 1);
tu_cs_emit(cs, A6XX_CP_SET_MARKER_0_MODE(RM6_BIN_RESOLVE));
tu_cs_emit(cs, A6XX_CP_SET_MARKER_0_MODE(RM6_BIN_RESOLVE) |
A6XX_CP_SET_MARKER_0_USES_GMEM);
tu6_emit_blit_scissor(cmd, cs, true);
@@ -2100,7 +2102,8 @@ tu6_render_tile(struct tu_cmd_buffer *cmd, struct tu_cs *cs,
if (use_hw_binning(cmd)) {
tu_cs_emit_pkt7(cs, CP_SET_MARKER, 1);
tu_cs_emit(cs, A6XX_CP_SET_MARKER_0_MODE(RM6_BIN_END_OF_DRAWS));
tu_cs_emit(cs, A6XX_CP_SET_MARKER_0_MODE(RM6_BIN_END_OF_DRAWS) |
A6XX_CP_SET_MARKER_0_USES_GMEM);
}
/* Predicate is changed in draw_cs so we have to re-emit it */
@@ -2115,6 +2118,11 @@ tu6_render_tile(struct tu_cmd_buffer *cmd, struct tu_cs *cs,
tu_clone_trace_range(cmd, cs, cmd->trace_renderpass_start,
cmd->trace_renderpass_end);
tu_cs_emit_wfi(cs);
tu_cs_emit_pkt7(cs, CP_SET_MARKER, 1);
tu_cs_emit(cs, A6XX_CP_SET_MARKER_0_MODE(RM6_BIN_RENDER_END));
tu_cs_sanity_check(cs);
trace_end_draw_ib_gmem(&cmd->trace, &cmd->cs);
src/gallium/drivers/freedreno/a6xx/fd6_gmem.cc
+9 -3
View File
@@ -1192,7 +1192,8 @@ fd6_emit_tile_prep(struct fd_batch *batch, const struct fd_tile *tile)
emit_marker6(ring, 7);
OUT_PKT7(ring, CP_SET_MARKER, 1);
OUT_RING(ring, A6XX_CP_SET_MARKER_0_MODE(RM6_BIN_RENDER_START));
OUT_RING(ring, A6XX_CP_SET_MARKER_0_MODE(RM6_BIN_RENDER_START) |
A6XX_CP_SET_MARKER_0_USES_GMEM);
emit_marker6(ring, 7);
uint32_t x1 = tile->xoff;
@@ -1774,7 +1775,8 @@ fd6_emit_tile_gmem2mem(struct fd_batch *batch, const struct fd_tile *tile)
if (use_hw_binning(batch)) {
OUT_PKT7(ring, CP_SET_MARKER, 1);
OUT_RING(ring, A6XX_CP_SET_MARKER_0_MODE(RM6_BIN_END_OF_DRAWS));
OUT_RING(ring, A6XX_CP_SET_MARKER_0_MODE(RM6_BIN_END_OF_DRAWS) |
A6XX_CP_SET_MARKER_0_USES_GMEM);
}
OUT_PKT7(ring, CP_SET_DRAW_STATE, 3);
@@ -1789,7 +1791,8 @@ fd6_emit_tile_gmem2mem(struct fd_batch *batch, const struct fd_tile *tile)
emit_marker6(ring, 7);
OUT_PKT7(ring, CP_SET_MARKER, 1);
OUT_RING(ring, A6XX_CP_SET_MARKER_0_MODE(RM6_BIN_RESOLVE));
OUT_RING(ring, A6XX_CP_SET_MARKER_0_MODE(RM6_BIN_RESOLVE) |
A6XX_CP_SET_MARKER_0_USES_GMEM);
emit_marker6(ring, 7);
if (batch->tile_store) {
@@ -1797,6 +1800,9 @@ fd6_emit_tile_gmem2mem(struct fd_batch *batch, const struct fd_tile *tile)
emit_conditional_ib(batch, tile, batch->tile_store);
trace_end_tile_stores(&batch->trace, batch->gmem);
}
OUT_PKT7(ring, CP_SET_MARKER, 1);
OUT_RING(ring, A6XX_CP_SET_MARKER_0_MODE(RM6_BIN_RENDER_END));
}
template <chip CHIP>