i965: use aligned malloc for context instead of ralloc

Fixes: 3175b63a ("mesa: don't allocate matrices with malloc")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4118
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8805>
This commit is contained in:
Tapani Pälli
2021-02-02 11:33:23 +02:00
committed by Marge Bot
parent a545fe9742
commit b609d4677d
4 changed files with 13 additions and 9 deletions
+7 -4
View File
@@ -924,7 +924,8 @@ brw_process_driconf_options(struct brw_context *brw)
if (*vendor_str)
ctx->Const.VendorOverride = vendor_str;
ctx->Const.dri_config_options_sha1 = ralloc_array(brw, unsigned char, 20);
ctx->Const.dri_config_options_sha1 =
ralloc_array(brw->mem_ctx, unsigned char, 20);
driComputeOptionsSha1(&brw->screen->optionCache,
ctx->Const.dri_config_options_sha1);
}
@@ -968,13 +969,14 @@ brwCreateContext(gl_api api,
((ctx_config->attribute_mask & __DRIVER_CONTEXT_ATTRIB_RESET_STRATEGY) &&
ctx_config->reset_strategy != __DRI_CTX_RESET_NO_NOTIFICATION);
struct brw_context *brw = rzalloc(NULL, struct brw_context);
struct brw_context *brw = align_calloc(sizeof(struct brw_context), 16);
if (!brw) {
fprintf(stderr, "%s: failed to alloc context\n", __func__);
*dri_ctx_error = __DRI_CTX_ERROR_NO_MEMORY;
return false;
}
brw->perf_ctx = gen_perf_new_context(brw);
brw->mem_ctx = ralloc_context(NULL);
brw->perf_ctx = gen_perf_new_context(brw->mem_ctx);
driContextPriv->driverPrivate = brw;
brw->driContext = driContextPriv;
@@ -1266,7 +1268,8 @@ intelDestroyContext(__DRIcontext * driContextPriv)
/* free the Mesa context */
_mesa_free_context_data(&brw->ctx, true);
ralloc_free(brw);
ralloc_free(brw->mem_ctx);
align_free(brw);
driContextPriv->driverPrivate = NULL;
}
+1
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@@ -1250,6 +1250,7 @@ struct brw_context
__DRIcontext *driContext;
struct intel_screen *screen;
void *mem_ctx;
};
/* brw_clear.c */
@@ -487,7 +487,7 @@ brw_init_perf_query_info(struct gl_context *ctx)
if (!oa_metrics_kernel_support(brw->screen->fd, devinfo))
return 0;
perf_cfg = gen_perf_new(ctx);
perf_cfg = gen_perf_new(brw->mem_ctx);
perf_cfg->vtbl.bo_alloc = brw_oa_bo_alloc;
perf_cfg->vtbl.bo_unreference = (bo_unreference_t)brw_bo_unreference;
@@ -504,8 +504,8 @@ brw_init_perf_query_info(struct gl_context *ctx)
perf_cfg->vtbl.bo_wait_rendering = (bo_wait_rendering_t)brw_bo_wait_rendering;
perf_cfg->vtbl.bo_busy = (bo_busy_t)brw_bo_busy;
gen_perf_init_context(perf_ctx, perf_cfg, brw, brw, brw->bufmgr, devinfo,
brw->hw_ctx, brw->screen->fd);
gen_perf_init_context(perf_ctx, perf_cfg, brw->mem_ctx, brw, brw->bufmgr,
devinfo, brw->hw_ctx, brw->screen->fd);
gen_perf_init_metrics(perf_cfg, devinfo, brw->screen->fd,
true /* pipeline stats */);
+2 -2
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@@ -1132,8 +1132,8 @@ intel_fbo_init(struct brw_context *brw)
dd->EGLImageTargetRenderbufferStorage =
intel_image_target_renderbuffer_storage;
brw->render_cache = _mesa_hash_table_create(brw, _mesa_hash_pointer,
brw->render_cache = _mesa_hash_table_create(brw->mem_ctx, _mesa_hash_pointer,
_mesa_key_pointer_equal);
brw->depth_cache = _mesa_set_create(brw, _mesa_hash_pointer,
brw->depth_cache = _mesa_set_create(brw->mem_ctx, _mesa_hash_pointer,
_mesa_key_pointer_equal);
}