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radv/meta: rename dest to dst

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Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22794>
This commit is contained in:
Samuel Pitoiset
2023-05-02 12:17:26 +02:00
committed by Marge Bot
parent 63b5b93dd3
commit b59935e2e7
7 changed files with 97 additions and 97 deletions
Download Patch File Download Diff File Expand all files Collapse all files

12
src/amd/vulkan/meta/radv_meta.c
View File

@@ -245,20 +245,20 @@ radv_meta_get_view_type(const struct radv_image *image)
* VkImageViewCreateInfo::subresourceRange::baseArrayLayer.
*/
uint32_t
radv_meta_get_iview_layer(const struct radv_image *dest_image,
const VkImageSubresourceLayers *dest_subresource,
const VkOffset3D *dest_offset)
radv_meta_get_iview_layer(const struct radv_image *dst_image,
const VkImageSubresourceLayers *dst_subresource,
const VkOffset3D *dst_offset)
{
switch (dest_image->vk.image_type) {
switch (dst_image->vk.image_type) {
case VK_IMAGE_TYPE_1D:
case VK_IMAGE_TYPE_2D:
return dest_subresource->baseArrayLayer;
return dst_subresource->baseArrayLayer;
case VK_IMAGE_TYPE_3D:
/* HACK: Vulkan does not allow attaching a 3D image to a framebuffer,
* but meta does it anyway. When doing so, we translate the
* destination's z offset into an array offset.
*/
return dest_offset->z;
return dst_offset->z;
default:
assert(!"bad VkImageType");
return 0;

14
src/amd/vulkan/meta/radv_meta.h
View File

@@ -120,9 +120,9 @@ void radv_meta_restore(const struct radv_meta_saved_state *state,
VkImageViewType radv_meta_get_view_type(const struct radv_image *image);
uint32_t radv_meta_get_iview_layer(const struct radv_image *dest_image,
const VkImageSubresourceLayers *dest_subresource,
const VkOffset3D *dest_offset);
uint32_t radv_meta_get_iview_layer(const struct radv_image *dst_image,
const VkImageSubresourceLayers *dst_subresource,
const VkOffset3D *dst_offset);
struct radv_meta_blit2d_surf {
/** The size of an element in bytes. */
@@ -203,14 +203,14 @@ void radv_fmask_copy(struct radv_cmd_buffer *cmd_buffer, struct radv_meta_blit2d
void radv_meta_resolve_compute_image(struct radv_cmd_buffer *cmd_buffer,
struct radv_image *src_image, VkFormat src_format,
VkImageLayout src_image_layout, struct radv_image *dest_image,
VkFormat dest_format, VkImageLayout dest_image_layout,
VkImageLayout src_image_layout, struct radv_image *dst_image,
VkFormat dst_format, VkImageLayout dst_image_layout,
const VkImageResolve2 *region);
void radv_meta_resolve_fragment_image(struct radv_cmd_buffer *cmd_buffer,
struct radv_image *src_image, VkImageLayout src_image_layout,
struct radv_image *dest_image,
VkImageLayout dest_image_layout,
struct radv_image *dst_image,
VkImageLayout dst_image_layout,
const VkImageResolve2 *region);
void radv_decompress_resolve_rendering_src(struct radv_cmd_buffer *cmd_buffer);

30
src/amd/vulkan/meta/radv_meta_blit.c
View File

@@ -27,8 +27,8 @@
struct blit_region {
VkOffset3D src_offset;
VkExtent3D src_extent;
VkOffset3D dest_offset;
VkExtent3D dest_extent;
VkOffset3D dst_offset;
VkExtent3D dst_extent;
};
static VkResult build_pipeline(struct radv_device *device, VkImageAspectFlagBits aspect,
@@ -194,18 +194,18 @@ translate_sampler_dim(VkImageType type)
static void
meta_emit_blit(struct radv_cmd_buffer *cmd_buffer, struct radv_image *src_image,
struct radv_image_view *src_iview, VkImageLayout src_image_layout,
float src_offset_0[3], float src_offset_1[3], struct radv_image *dest_image,
struct radv_image_view *dest_iview, VkImageLayout dest_image_layout,
VkRect2D dest_box, VkSampler sampler)
float src_offset_0[3], float src_offset_1[3], struct radv_image *dst_image,
struct radv_image_view *dst_iview, VkImageLayout dst_image_layout,
VkRect2D dst_box, VkSampler sampler)
{
struct radv_device *device = cmd_buffer->device;
uint32_t src_width = radv_minify(src_iview->image->info.width, src_iview->vk.base_mip_level);
uint32_t src_height = radv_minify(src_iview->image->info.height, src_iview->vk.base_mip_level);
uint32_t src_depth = radv_minify(src_iview->image->info.depth, src_iview->vk.base_mip_level);
uint32_t dst_width = radv_minify(dest_iview->image->info.width, dest_iview->vk.base_mip_level);
uint32_t dst_height = radv_minify(dest_iview->image->info.height, dest_iview->vk.base_mip_level);
uint32_t dst_width = radv_minify(dst_iview->image->info.width, dst_iview->vk.base_mip_level);
uint32_t dst_height = radv_minify(dst_iview->image->info.height, dst_iview->vk.base_mip_level);
assert(src_image->info.samples == dest_image->info.samples);
assert(src_image->info.samples == dst_image->info.samples);
float vertex_push_constants[5] = {
src_offset_0[0] / (float)src_width, src_offset_0[1] / (float)src_height,
@@ -223,7 +223,7 @@ meta_emit_blit(struct radv_cmd_buffer *cmd_buffer, struct radv_image *src_image,
switch (src_iview->vk.aspects) {
case VK_IMAGE_ASPECT_COLOR_BIT: {
fs_key = radv_format_meta_fs_key(device, dest_image->vk.format);
fs_key = radv_format_meta_fs_key(device, dst_image->vk.format);
format = radv_fs_key_format_exemplars[fs_key];
switch (src_image->vk.image_type) {
@@ -322,12 +322,12 @@ meta_emit_blit(struct radv_cmd_buffer *cmd_buffer, struct radv_image *src_image,
VkRenderingAttachmentInfo color_att;
if (src_iview->image->vk.aspects == VK_IMAGE_ASPECT_COLOR_BIT) {
unsigned dst_layout = radv_meta_dst_layout_from_layout(dest_image_layout);
unsigned dst_layout = radv_meta_dst_layout_from_layout(dst_image_layout);
VkImageLayout layout = radv_meta_dst_layout_to_layout(dst_layout);
color_att = (VkRenderingAttachmentInfo) {
.sType = VK_STRUCTURE_TYPE_RENDERING_ATTACHMENT_INFO,
.imageView = radv_image_view_to_handle(dest_iview),
.imageView = radv_image_view_to_handle(dst_iview),
.imageLayout = layout,
.loadOp = VK_ATTACHMENT_LOAD_OP_LOAD,
.storeOp = VK_ATTACHMENT_STORE_OP_STORE,
@@ -338,12 +338,12 @@ meta_emit_blit(struct radv_cmd_buffer *cmd_buffer, struct radv_image *src_image,
VkRenderingAttachmentInfo depth_att;
if (src_iview->image->vk.aspects & VK_IMAGE_ASPECT_DEPTH_BIT) {
enum radv_blit_ds_layout ds_layout = radv_meta_blit_ds_to_type(dest_image_layout);
enum radv_blit_ds_layout ds_layout = radv_meta_blit_ds_to_type(dst_image_layout);
VkImageLayout layout = radv_meta_blit_ds_to_layout(ds_layout);
depth_att = (VkRenderingAttachmentInfo) {
.sType = VK_STRUCTURE_TYPE_RENDERING_ATTACHMENT_INFO,
.imageView = radv_image_view_to_handle(dest_iview),
.imageView = radv_image_view_to_handle(dst_iview),
.imageLayout = layout,
.loadOp = VK_ATTACHMENT_LOAD_OP_LOAD,
.storeOp = VK_ATTACHMENT_STORE_OP_STORE,
@@ -353,12 +353,12 @@ meta_emit_blit(struct radv_cmd_buffer *cmd_buffer, struct radv_image *src_image,
VkRenderingAttachmentInfo stencil_att;
if (src_iview->image->vk.aspects & VK_IMAGE_ASPECT_STENCIL_BIT) {
enum radv_blit_ds_layout ds_layout = radv_meta_blit_ds_to_type(dest_image_layout);
enum radv_blit_ds_layout ds_layout = radv_meta_blit_ds_to_type(dst_image_layout);
VkImageLayout layout = radv_meta_blit_ds_to_layout(ds_layout);
stencil_att = (VkRenderingAttachmentInfo) {
.sType = VK_STRUCTURE_TYPE_RENDERING_ATTACHMENT_INFO,
.imageView = radv_image_view_to_handle(dest_iview),
.imageView = radv_image_view_to_handle(dst_iview),
.imageLayout = layout,
.loadOp = VK_ATTACHMENT_LOAD_OP_LOAD,
.storeOp = VK_ATTACHMENT_STORE_OP_STORE,

12
src/amd/vulkan/meta/radv_meta_etc_decode.c
View File

@@ -629,7 +629,7 @@ radv_get_etc_decode_pipeline(struct radv_cmd_buffer *cmd_buffer)
static void
decode_etc(struct radv_cmd_buffer *cmd_buffer, struct radv_image_view *src_iview,
struct radv_image_view *dest_iview, const VkOffset3D *offset, const VkExtent3D *extent)
struct radv_image_view *dst_iview, const VkOffset3D *offset, const VkExtent3D *extent)
{
struct radv_device *device = cmd_buffer->device;
@@ -656,7 +656,7 @@ decode_etc(struct radv_cmd_buffer *cmd_buffer, struct radv_image_view *src_iview
.pImageInfo = (VkDescriptorImageInfo[]){
{
.sampler = VK_NULL_HANDLE,
.imageView = radv_image_view_to_handle(dest_iview),
.imageView = radv_image_view_to_handle(dst_iview),
.imageLayout = VK_IMAGE_LAYOUT_GENERAL,
},
}}});
@@ -731,9 +731,9 @@ radv_meta_decode_etc(struct radv_cmd_buffer *cmd_buffer, struct radv_image *imag
default:
store_format = VK_FORMAT_R8G8B8A8_UNORM;
}
struct radv_image_view dest_iview;
struct radv_image_view dst_iview;
radv_image_view_init(
&dest_iview, cmd_buffer->device,
&dst_iview, cmd_buffer->device,
&(VkImageViewCreateInfo){
.sType = VK_STRUCTURE_TYPE_IMAGE_VIEW_CREATE_INFO,
.image = radv_image_to_handle(image),
@@ -750,11 +750,11 @@ radv_meta_decode_etc(struct radv_cmd_buffer *cmd_buffer, struct radv_image *imag
},
0, NULL);
decode_etc(cmd_buffer, &src_iview, &dest_iview, &(VkOffset3D){offset.x, offset.y, base_slice},
decode_etc(cmd_buffer, &src_iview, &dst_iview, &(VkOffset3D){offset.x, offset.y, base_slice},
&(VkExtent3D){extent.width, extent.height, slice_count});
radv_image_view_finish(&src_iview);
radv_image_view_finish(&dest_iview);
radv_image_view_finish(&dst_iview);
radv_meta_restore(&saved_state, cmd_buffer);
}

16
src/amd/vulkan/meta/radv_meta_resolve.c
View File

@@ -271,13 +271,13 @@ image_hw_resolve_compat(const struct radv_device *device, struct radv_image *src
static void
radv_pick_resolve_method_images(struct radv_device *device, struct radv_image *src_image,
VkFormat src_format, struct radv_image *dest_image,
unsigned dest_level, VkImageLayout dest_image_layout,
VkFormat src_format, struct radv_image *dst_image,
unsigned dst_level, VkImageLayout dst_image_layout,
struct radv_cmd_buffer *cmd_buffer,
enum radv_resolve_method *method)
{
uint32_t queue_mask = radv_image_queue_family_mask(dest_image, cmd_buffer->qf,
uint32_t queue_mask = radv_image_queue_family_mask(dst_image, cmd_buffer->qf,
cmd_buffer->qf);
if (vk_format_is_color(src_format)) {
@@ -286,10 +286,10 @@ radv_pick_resolve_method_images(struct radv_device *device, struct radv_image *s
* re-initialize it after resolving using compute.
* TODO: Add support for layered and int to the fragment path.
*/
if (radv_layout_dcc_compressed(device, dest_image, dest_level, dest_image_layout,
if (radv_layout_dcc_compressed(device, dst_image, dst_level, dst_image_layout,
queue_mask)) {
*method = RESOLVE_FRAGMENT;
} else if (!image_hw_resolve_compat(device, src_image, dest_image)) {
} else if (!image_hw_resolve_compat(device, src_image, dst_image)) {
/* The micro tile mode only needs to match for the HW
* resolve path which is the default path for non-DCC
* resolves.
@@ -301,11 +301,11 @@ radv_pick_resolve_method_images(struct radv_device *device, struct radv_image *s
*method = RESOLVE_COMPUTE;
else if (vk_format_is_int(src_format))
*method = RESOLVE_COMPUTE;
else if (src_image->info.array_size > 1 || dest_image->info.array_size > 1)
else if (src_image->info.array_size > 1 || dst_image->info.array_size > 1)
*method = RESOLVE_COMPUTE;
} else {
if (src_image->info.array_size > 1 || dest_image->info.array_size > 1 ||
(dest_image->planes[0].surface.flags & RADEON_SURF_NO_RENDER_TARGET))
if (src_image->info.array_size > 1 || dst_image->info.array_size > 1 ||
(dst_image->planes[0].surface.flags & RADEON_SURF_NO_RENDER_TARGET))
*method = RESOLVE_COMPUTE;
else
*method = RESOLVE_FRAGMENT;

66
src/amd/vulkan/meta/radv_meta_resolve_cs.c
View File

@@ -487,8 +487,8 @@ radv_get_resolve_pipeline(struct radv_cmd_buffer *cmd_buffer, struct radv_image_
static void
emit_resolve(struct radv_cmd_buffer *cmd_buffer, struct radv_image_view *src_iview,
struct radv_image_view *dest_iview, const VkOffset2D *src_offset,
const VkOffset2D *dest_offset, const VkExtent2D *resolve_extent)
struct radv_image_view *dst_iview, const VkOffset2D *src_offset,
const VkOffset2D *dst_offset, const VkExtent2D *resolve_extent)
{
struct radv_device *device = cmd_buffer->device;
VkPipeline *pipeline;
@@ -516,7 +516,7 @@ emit_resolve(struct radv_cmd_buffer *cmd_buffer, struct radv_image_view *src_ivi
.pImageInfo = (VkDescriptorImageInfo[]){
{
.sampler = VK_NULL_HANDLE,
.imageView = radv_image_view_to_handle(dest_iview),
.imageView = radv_image_view_to_handle(dst_iview),
.imageLayout = VK_IMAGE_LAYOUT_GENERAL,
},
}}});
@@ -529,8 +529,8 @@ emit_resolve(struct radv_cmd_buffer *cmd_buffer, struct radv_image_view *src_ivi
unsigned push_constants[4] = {
src_offset->x,
src_offset->y,
dest_offset->x,
dest_offset->y,
dst_offset->x,
dst_offset->y,
};
radv_CmdPushConstants(radv_cmd_buffer_to_handle(cmd_buffer),
device->meta_state.resolve_compute.p_layout, VK_SHADER_STAGE_COMPUTE_BIT,
@@ -540,7 +540,7 @@ emit_resolve(struct radv_cmd_buffer *cmd_buffer, struct radv_image_view *src_ivi
static void
emit_depth_stencil_resolve(struct radv_cmd_buffer *cmd_buffer, struct radv_image_view *src_iview,
struct radv_image_view *dest_iview, const VkOffset2D *resolve_offset,
struct radv_image_view *dst_iview, const VkOffset2D *resolve_offset,
const VkExtent3D *resolve_extent, VkImageAspectFlags aspects,
VkResolveModeFlagBits resolve_mode)
{
@@ -572,7 +572,7 @@ emit_depth_stencil_resolve(struct radv_cmd_buffer *cmd_buffer, struct radv_image
.pImageInfo = (VkDescriptorImageInfo[]){
{
.sampler = VK_NULL_HANDLE,
.imageView = radv_image_view_to_handle(dest_iview),
.imageView = radv_image_view_to_handle(dst_iview),
.imageLayout = VK_IMAGE_LAYOUT_GENERAL,
},
}}});
@@ -631,25 +631,25 @@ emit_depth_stencil_resolve(struct radv_cmd_buffer *cmd_buffer, struct radv_image
void
radv_meta_resolve_compute_image(struct radv_cmd_buffer *cmd_buffer, struct radv_image *src_image,
VkFormat src_format, VkImageLayout src_image_layout,
struct radv_image *dest_image, VkFormat dest_format,
VkImageLayout dest_image_layout, const VkImageResolve2 *region)
struct radv_image *dst_image, VkFormat dst_format,
VkImageLayout dst_image_layout, const VkImageResolve2 *region)
{
struct radv_meta_saved_state saved_state;
/* For partial resolves, DCC should be decompressed before resolving
* because the metadata is re-initialized to the uncompressed after.
*/
uint32_t queue_mask = radv_image_queue_family_mask(dest_image, cmd_buffer->qf,
uint32_t queue_mask = radv_image_queue_family_mask(dst_image, cmd_buffer->qf,
cmd_buffer->qf);
if (!radv_image_use_dcc_image_stores(cmd_buffer->device, dest_image) &&
radv_layout_dcc_compressed(cmd_buffer->device, dest_image, region->dstSubresource.mipLevel,
dest_image_layout, queue_mask) &&
if (!radv_image_use_dcc_image_stores(cmd_buffer->device, dst_image) &&
radv_layout_dcc_compressed(cmd_buffer->device, dst_image, region->dstSubresource.mipLevel,
dst_image_layout, queue_mask) &&
(region->dstOffset.x || region->dstOffset.y || region->dstOffset.z ||
region->extent.width != dest_image->info.width ||
region->extent.height != dest_image->info.height ||
region->extent.depth != dest_image->info.depth)) {
radv_decompress_dcc(cmd_buffer, dest_image,
region->extent.width != dst_image->info.width ||
region->extent.height != dst_image->info.height ||
region->extent.depth != dst_image->info.depth)) {
radv_decompress_dcc(cmd_buffer, dst_image,
&(VkImageSubresourceRange){
.aspectMask = region->dstSubresource.aspectMask,
.baseMipLevel = region->dstSubresource.mipLevel,
@@ -670,12 +670,12 @@ radv_meta_resolve_compute_image(struct radv_cmd_buffer *cmd_buffer, struct radv_
const uint32_t src_base_layer =
radv_meta_get_iview_layer(src_image, &region->srcSubresource, &region->srcOffset);
const uint32_t dest_base_layer =
radv_meta_get_iview_layer(dest_image, &region->dstSubresource, &region->dstOffset);
const uint32_t dst_base_layer =
radv_meta_get_iview_layer(dst_image, &region->dstSubresource, &region->dstOffset);
const struct VkExtent3D extent = vk_image_sanitize_extent(&src_image->vk, region->extent);
const struct VkOffset3D srcOffset = vk_image_sanitize_offset(&src_image->vk, region->srcOffset);
const struct VkOffset3D dstOffset = vk_image_sanitize_offset(&dest_image->vk, region->dstOffset);
const struct VkOffset3D dstOffset = vk_image_sanitize_offset(&dst_image->vk, region->dstOffset);
for (uint32_t layer = 0; layer < region->srcSubresource.layerCount; ++layer) {
@@ -697,37 +697,37 @@ radv_meta_resolve_compute_image(struct radv_cmd_buffer *cmd_buffer, struct radv_
},
0, NULL);
struct radv_image_view dest_iview;
radv_image_view_init(&dest_iview, cmd_buffer->device,
struct radv_image_view dst_iview;
radv_image_view_init(&dst_iview, cmd_buffer->device,
&(VkImageViewCreateInfo){
.sType = VK_STRUCTURE_TYPE_IMAGE_VIEW_CREATE_INFO,
.image = radv_image_to_handle(dest_image),
.viewType = radv_meta_get_view_type(dest_image),
.format = vk_to_non_srgb_format(dest_format),
.image = radv_image_to_handle(dst_image),
.viewType = radv_meta_get_view_type(dst_image),
.format = vk_to_non_srgb_format(dst_format),
.subresourceRange =
{
.aspectMask = VK_IMAGE_ASPECT_COLOR_BIT,
.baseMipLevel = region->dstSubresource.mipLevel,
.levelCount = 1,
.baseArrayLayer = dest_base_layer + layer,
.baseArrayLayer = dst_base_layer + layer,
.layerCount = 1,
},
},
0, NULL);
emit_resolve(cmd_buffer, &src_iview, &dest_iview, &(VkOffset2D){srcOffset.x, srcOffset.y},
emit_resolve(cmd_buffer, &src_iview, &dst_iview, &(VkOffset2D){srcOffset.x, srcOffset.y},
&(VkOffset2D){dstOffset.x, dstOffset.y},
&(VkExtent2D){extent.width, extent.height});
radv_image_view_finish(&src_iview);
radv_image_view_finish(&dest_iview);
radv_image_view_finish(&dst_iview);
}
radv_meta_restore(&saved_state, cmd_buffer);
if (!radv_image_use_dcc_image_stores(cmd_buffer->device, dest_image) &&
radv_layout_dcc_compressed(cmd_buffer->device, dest_image, region->dstSubresource.mipLevel,
dest_image_layout, queue_mask)) {
if (!radv_image_use_dcc_image_stores(cmd_buffer->device, dst_image) &&
radv_layout_dcc_compressed(cmd_buffer->device, dst_image, region->dstSubresource.mipLevel,
dst_image_layout, queue_mask)) {
cmd_buffer->state.flush_bits |= RADV_CMD_FLAG_CS_PARTIAL_FLUSH | RADV_CMD_FLAG_INV_VCACHE;
@@ -735,11 +735,11 @@ radv_meta_resolve_compute_image(struct radv_cmd_buffer *cmd_buffer, struct radv_
.aspectMask = VK_IMAGE_ASPECT_COLOR_BIT,
.baseMipLevel = region->dstSubresource.mipLevel,
.levelCount = 1,
.baseArrayLayer = dest_base_layer,
.baseArrayLayer = dst_base_layer,
.layerCount = region->dstSubresource.layerCount,
};
cmd_buffer->state.flush_bits |= radv_init_dcc(cmd_buffer, dest_image, &range, 0xffffffff);
cmd_buffer->state.flush_bits |= radv_init_dcc(cmd_buffer, dst_image, &range, 0xffffffff);
}
}

44
src/amd/vulkan/meta/radv_meta_resolve_fs.c
View File

@@ -602,8 +602,8 @@ radv_get_resolve_pipeline(struct radv_cmd_buffer *cmd_buffer, struct radv_image_
static void
emit_resolve(struct radv_cmd_buffer *cmd_buffer, struct radv_image_view *src_iview,
struct radv_image_view *dest_iview, const VkOffset2D *src_offset,
const VkOffset2D *dest_offset)
struct radv_image_view *dst_iview, const VkOffset2D *src_offset,
const VkOffset2D *dst_offset)
{
struct radv_device *device = cmd_buffer->device;
VkCommandBuffer cmd_buffer_h = radv_cmd_buffer_to_handle(cmd_buffer);
@@ -631,23 +631,23 @@ emit_resolve(struct radv_cmd_buffer *cmd_buffer, struct radv_image_view *src_ivi
cmd_buffer->state.flush_bits |=
radv_dst_access_flush(cmd_buffer, VK_ACCESS_2_SHADER_READ_BIT, src_iview->image) |
radv_dst_access_flush(cmd_buffer, VK_ACCESS_2_COLOR_ATTACHMENT_WRITE_BIT, dest_iview->image);
radv_dst_access_flush(cmd_buffer, VK_ACCESS_2_COLOR_ATTACHMENT_WRITE_BIT, dst_iview->image);
unsigned push_constants[2] = {
src_offset->x - dest_offset->x,
src_offset->y - dest_offset->y,
src_offset->x - dst_offset->x,
src_offset->y - dst_offset->y,
};
radv_CmdPushConstants(radv_cmd_buffer_to_handle(cmd_buffer),
device->meta_state.resolve_fragment.p_layout, VK_SHADER_STAGE_FRAGMENT_BIT,
0, 8, push_constants);
pipeline = radv_get_resolve_pipeline(cmd_buffer, src_iview, dest_iview);
pipeline = radv_get_resolve_pipeline(cmd_buffer, src_iview, dst_iview);
radv_CmdBindPipeline(cmd_buffer_h, VK_PIPELINE_BIND_POINT_GRAPHICS, *pipeline);
radv_CmdDraw(cmd_buffer_h, 3, 1, 0, 0);
cmd_buffer->state.flush_bits |=
radv_src_access_flush(cmd_buffer, VK_ACCESS_2_COLOR_ATTACHMENT_WRITE_BIT, dest_iview->image);
radv_src_access_flush(cmd_buffer, VK_ACCESS_2_COLOR_ATTACHMENT_WRITE_BIT, dst_iview->image);
}
static void
@@ -741,11 +741,11 @@ emit_depth_stencil_resolve(struct radv_cmd_buffer *cmd_buffer, struct radv_image
void
radv_meta_resolve_fragment_image(struct radv_cmd_buffer *cmd_buffer, struct radv_image *src_image,
VkImageLayout src_image_layout, struct radv_image *dest_image,
VkImageLayout dest_image_layout, const VkImageResolve2 *region)
VkImageLayout src_image_layout, struct radv_image *dst_image,
VkImageLayout dst_image_layout, const VkImageResolve2 *region)
{
struct radv_meta_saved_state saved_state;
unsigned dst_layout = radv_meta_dst_layout_from_layout(dest_image_layout);
unsigned dst_layout = radv_meta_dst_layout_from_layout(dst_image_layout);
VkImageLayout layout = radv_meta_dst_layout_to_layout(dst_layout);
radv_meta_save(
@@ -759,12 +759,12 @@ radv_meta_resolve_fragment_image(struct radv_cmd_buffer *cmd_buffer, struct radv
const uint32_t src_base_layer =
radv_meta_get_iview_layer(src_image, &region->srcSubresource, &region->srcOffset);
const uint32_t dest_base_layer =
radv_meta_get_iview_layer(dest_image, &region->dstSubresource, &region->dstOffset);
const uint32_t dst_base_layer =
radv_meta_get_iview_layer(dst_image, &region->dstSubresource, &region->dstOffset);
const struct VkExtent3D extent = vk_image_sanitize_extent(&src_image->vk, region->extent);
const struct VkOffset3D srcOffset = vk_image_sanitize_offset(&src_image->vk, region->srcOffset);
const struct VkOffset3D dstOffset = vk_image_sanitize_offset(&dest_image->vk, region->dstOffset);
const struct VkOffset3D dstOffset = vk_image_sanitize_offset(&dst_image->vk, region->dstOffset);
VkRect2D resolve_area = {
.offset = { dstOffset.x, dstOffset.y },
@@ -801,19 +801,19 @@ radv_meta_resolve_fragment_image(struct radv_cmd_buffer *cmd_buffer, struct radv
},
0, NULL);
struct radv_image_view dest_iview;
radv_image_view_init(&dest_iview, cmd_buffer->device,
struct radv_image_view dst_iview;
radv_image_view_init(&dst_iview, cmd_buffer->device,
&(VkImageViewCreateInfo){
.sType = VK_STRUCTURE_TYPE_IMAGE_VIEW_CREATE_INFO,
.image = radv_image_to_handle(dest_image),
.viewType = radv_meta_get_view_type(dest_image),
.format = dest_image->vk.format,
.image = radv_image_to_handle(dst_image),
.viewType = radv_meta_get_view_type(dst_image),
.format = dst_image->vk.format,
.subresourceRange =
{
.aspectMask = VK_IMAGE_ASPECT_COLOR_BIT,
.baseMipLevel = region->dstSubresource.mipLevel,
.levelCount = 1,
.baseArrayLayer = dest_base_layer + layer,
.baseArrayLayer = dst_base_layer + layer,
.layerCount = 1,
},
},
@@ -821,7 +821,7 @@ radv_meta_resolve_fragment_image(struct radv_cmd_buffer *cmd_buffer, struct radv
const VkRenderingAttachmentInfo color_att = {
.sType = VK_STRUCTURE_TYPE_RENDERING_ATTACHMENT_INFO,
.imageView = radv_image_view_to_handle(&dest_iview),
.imageView = radv_image_view_to_handle(&dst_iview),
.imageLayout = layout,
.loadOp = VK_ATTACHMENT_LOAD_OP_LOAD,
.storeOp = VK_ATTACHMENT_STORE_OP_STORE,
@@ -837,13 +837,13 @@ radv_meta_resolve_fragment_image(struct radv_cmd_buffer *cmd_buffer, struct radv
radv_CmdBeginRendering(radv_cmd_buffer_to_handle(cmd_buffer), &rendering_info);
emit_resolve(cmd_buffer, &src_iview, &dest_iview, &(VkOffset2D){srcOffset.x, srcOffset.y},
emit_resolve(cmd_buffer, &src_iview, &dst_iview, &(VkOffset2D){srcOffset.x, srcOffset.y},
&(VkOffset2D){dstOffset.x, dstOffset.y});
radv_CmdEndRendering(radv_cmd_buffer_to_handle(cmd_buffer));
radv_image_view_finish(&src_iview);
radv_image_view_finish(&dest_iview);
radv_image_view_finish(&dst_iview);
}
radv_meta_restore(&saved_state, cmd_buffer);