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brw: move null_rt control up a layer

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We'll want to tune this setting based on other parameters.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Backport-to: 24.2
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31196>
This commit is contained in:
Lionel Landwerlin
2024-09-17 09:44:21 +03:00
committed by Marge Bot
parent 9b42215e0d
commit b45ce7d43e
3 changed files with 25 additions and 18 deletions
Download Patch File Download Diff File Expand all files Collapse all files
src/intel/compiler/brw_compile_fs.cpp
+18 -13
View File
@@ -22,27 +22,30 @@ using namespace brw;
static fs_inst *
brw_emit_single_fb_write(fs_visitor &s, const fs_builder &bld,
brw_reg color0, brw_reg color1,
brw_reg src0_alpha, unsigned components)
brw_reg src0_alpha, unsigned components,
bool null_rt)
{
assert(s.stage == MESA_SHADER_FRAGMENT);
struct brw_wm_prog_data *prog_data = brw_wm_prog_data(s.prog_data);
/* Hand over gl_FragDepth or the payload depth. */
const brw_reg dst_depth = fetch_payload_reg(bld, s.fs_payload().dest_depth_reg);
brw_reg src_depth, src_stencil;
brw_reg sources[FB_WRITE_LOGICAL_NUM_SRCS];
sources[FB_WRITE_LOGICAL_SRC_COLOR0] = color0;
sources[FB_WRITE_LOGICAL_SRC_COLOR1] = color1;
sources[FB_WRITE_LOGICAL_SRC_SRC0_ALPHA] = src0_alpha;
sources[FB_WRITE_LOGICAL_SRC_DST_DEPTH] = dst_depth;
sources[FB_WRITE_LOGICAL_SRC_COMPONENTS] = brw_imm_ud(components);
sources[FB_WRITE_LOGICAL_SRC_NULL_RT] = brw_imm_ud(null_rt);
if (prog_data->uses_omask)
sources[FB_WRITE_LOGICAL_SRC_OMASK] = s.sample_mask;
if (s.nir->info.outputs_written & BITFIELD64_BIT(FRAG_RESULT_DEPTH))
src_depth = s.frag_depth;
sources[FB_WRITE_LOGICAL_SRC_SRC_DEPTH] = s.frag_depth;
if (s.nir->info.outputs_written & BITFIELD64_BIT(FRAG_RESULT_STENCIL))
src_stencil = s.frag_stencil;
sources[FB_WRITE_LOGICAL_SRC_SRC_STENCIL] = s.frag_stencil;
const brw_reg sources[] = {
color0, color1, src0_alpha, src_depth, dst_depth, src_stencil,
(prog_data->uses_omask ? s.sample_mask : brw_reg()),
brw_imm_ud(components)
};
assert(ARRAY_SIZE(sources) - 1 == FB_WRITE_LOGICAL_SRC_COMPONENTS);
fs_inst *write = bld.emit(FS_OPCODE_FB_WRITE_LOGICAL, brw_reg(),
sources, ARRAY_SIZE(sources));
@@ -73,7 +76,8 @@ brw_do_emit_fb_writes(fs_visitor &s, int nr_color_regions, bool replicate_alpha)
src0_alpha = offset(s.outputs[0], bld, 3);
inst = brw_emit_single_fb_write(s, abld, s.outputs[target],
s.dual_src_output, src0_alpha, 4);
s.dual_src_output, src0_alpha, 4,
false);
inst->target = target;
}
@@ -90,7 +94,8 @@ brw_do_emit_fb_writes(fs_visitor &s, int nr_color_regions, bool replicate_alpha)
const brw_reg tmp = bld.vgrf(BRW_TYPE_UD, 4);
bld.LOAD_PAYLOAD(tmp, srcs, 4, 0);
inst = brw_emit_single_fb_write(s, bld, tmp, reg_undef, reg_undef, 4);
inst = brw_emit_single_fb_write(s, bld, tmp, reg_undef, reg_undef, 4,
true);
inst->target = 0;
}
src/intel/compiler/brw_eu_defines.h
+1
View File
@@ -500,6 +500,7 @@ enum fb_write_logical_srcs {
FB_WRITE_LOGICAL_SRC_SRC_STENCIL, /* gl_FragStencilRefARB */
FB_WRITE_LOGICAL_SRC_OMASK, /* Sample Mask (gl_SampleMask) */
FB_WRITE_LOGICAL_SRC_COMPONENTS, /* REQUIRED */
FB_WRITE_LOGICAL_SRC_NULL_RT, /* Null RT write */
FB_WRITE_LOGICAL_NUM_SRCS
};
src/intel/compiler/brw_lower_logical_sends.cpp
+6 -5
View File
@@ -289,6 +289,7 @@ lower_fb_write_logical_send(const fs_builder &bld, fs_inst *inst,
const fs_thread_payload &fs_payload)
{
assert(inst->src[FB_WRITE_LOGICAL_SRC_COMPONENTS].file == IMM);
assert(inst->src[FB_WRITE_LOGICAL_SRC_NULL_RT].file == IMM);
const intel_device_info *devinfo = bld.shader->devinfo;
const brw_reg color0 = inst->src[FB_WRITE_LOGICAL_SRC_COLOR0];
const brw_reg color1 = inst->src[FB_WRITE_LOGICAL_SRC_COLOR1];
@@ -299,6 +300,7 @@ lower_fb_write_logical_send(const fs_builder &bld, fs_inst *inst,
brw_reg sample_mask = inst->src[FB_WRITE_LOGICAL_SRC_OMASK];
const unsigned components =
inst->src[FB_WRITE_LOGICAL_SRC_COMPONENTS].ud;
const bool null_rt = inst->src[FB_WRITE_LOGICAL_SRC_NULL_RT].ud != 0;
assert(inst->target != 0 || src0_alpha.file == BAD_FILE);
@@ -482,7 +484,7 @@ lower_fb_write_logical_send(const fs_builder &bld, fs_inst *inst,
uint32_t ex_desc = 0;
if (devinfo->ver >= 20) {
ex_desc = inst->target << 21 |
(key->nr_color_regions == 0) << 20 |
null_rt << 20 |
(src0_alpha.file != BAD_FILE) << 15 |
(src_stencil.file != BAD_FILE) << 14 |
(src_depth.file != BAD_FILE) << 13 |
@@ -491,10 +493,9 @@ lower_fb_write_logical_send(const fs_builder &bld, fs_inst *inst,
/* Set the "Render Target Index" and "Src0 Alpha Present" fields
* in the extended message descriptor, in lieu of using a header.
*/
ex_desc = inst->target << 12 | (src0_alpha.file != BAD_FILE) << 15;
if (key->nr_color_regions == 0)
ex_desc |= 1 << 20; /* Null Render Target */
ex_desc = inst->target << 12 |
null_rt << 20 |
(src0_alpha.file != BAD_FILE) << 15;
}
inst->ex_desc = ex_desc;