anv/compiler: Get rid of GS support.
The geometry shader support is currently completely untested. As I go through and re-factor the compiler, I'd rather not refactor dead code that I don't have a way to know if I broke. Let's just remove it for now. We can put it back in easily enough later and then we'll do it properly.
This commit is contained in:
+3
-276
@@ -371,265 +371,6 @@ really_do_wm_prog(struct brw_context *brw,
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return true;
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}
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bool
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anv_codegen_gs_prog(struct brw_context *brw,
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struct gl_shader_program *prog,
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struct brw_geometry_program *gp,
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struct brw_gs_prog_key *key,
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struct anv_pipeline *pipeline)
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{
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struct brw_gs_compile c;
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memset(&c, 0, sizeof(c));
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c.key = *key;
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c.gp = gp;
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c.prog_data.include_primitive_id =
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(gp->program.Base.InputsRead & VARYING_BIT_PRIMITIVE_ID) != 0;
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c.prog_data.invocations = gp->program.Invocations;
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set_binding_table_layout(&c.prog_data.base.base,
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pipeline, VK_SHADER_STAGE_GEOMETRY);
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/* Allocate the references to the uniforms that will end up in the
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* prog_data associated with the compiled program, and which will be freed
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* by the state cache.
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*
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* Note: param_count needs to be num_uniform_components * 4, since we add
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* padding around uniform values below vec4 size, so the worst case is that
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* every uniform is a float which gets padded to the size of a vec4.
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*/
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struct gl_shader *gs = prog->_LinkedShaders[MESA_SHADER_GEOMETRY];
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int param_count = gp->program.Base.nir->num_uniforms * 4;
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c.prog_data.base.base.param =
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rzalloc_array(NULL, const gl_constant_value *, param_count);
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c.prog_data.base.base.pull_param =
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rzalloc_array(NULL, const gl_constant_value *, param_count);
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c.prog_data.base.base.image_param =
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rzalloc_array(NULL, struct brw_image_param, gs->NumImages);
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c.prog_data.base.base.nr_params = param_count;
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c.prog_data.base.base.nr_image_params = gs->NumImages;
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brw_nir_setup_glsl_uniforms(gp->program.Base.nir, prog, &gp->program.Base,
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&c.prog_data.base.base, false);
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if (brw->gen >= 8) {
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c.prog_data.static_vertex_count = !gp->program.Base.nir ? -1 :
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nir_gs_count_vertices(gp->program.Base.nir);
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}
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if (brw->gen >= 7) {
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if (gp->program.OutputType == GL_POINTS) {
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/* When the output type is points, the geometry shader may output data
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* to multiple streams, and EndPrimitive() has no effect. So we
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* configure the hardware to interpret the control data as stream ID.
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*/
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c.prog_data.control_data_format = GEN7_GS_CONTROL_DATA_FORMAT_GSCTL_SID;
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/* We only have to emit control bits if we are using streams */
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if (prog->Geom.UsesStreams)
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c.control_data_bits_per_vertex = 2;
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else
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c.control_data_bits_per_vertex = 0;
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} else {
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/* When the output type is triangle_strip or line_strip, EndPrimitive()
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* may be used to terminate the current strip and start a new one
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* (similar to primitive restart), and outputting data to multiple
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* streams is not supported. So we configure the hardware to interpret
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* the control data as EndPrimitive information (a.k.a. "cut bits").
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*/
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c.prog_data.control_data_format = GEN7_GS_CONTROL_DATA_FORMAT_GSCTL_CUT;
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/* We only need to output control data if the shader actually calls
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* EndPrimitive().
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*/
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c.control_data_bits_per_vertex = gp->program.UsesEndPrimitive ? 1 : 0;
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}
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} else {
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/* There are no control data bits in gen6. */
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c.control_data_bits_per_vertex = 0;
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/* If it is using transform feedback, enable it */
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if (prog->TransformFeedback.NumVarying)
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c.prog_data.gen6_xfb_enabled = true;
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else
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c.prog_data.gen6_xfb_enabled = false;
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}
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c.control_data_header_size_bits =
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gp->program.VerticesOut * c.control_data_bits_per_vertex;
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/* 1 HWORD = 32 bytes = 256 bits */
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c.prog_data.control_data_header_size_hwords =
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ALIGN(c.control_data_header_size_bits, 256) / 256;
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GLbitfield64 outputs_written = gp->program.Base.OutputsWritten;
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brw_compute_vue_map(brw->intelScreen->devinfo,
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&c.prog_data.base.vue_map, outputs_written,
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prog ? prog->SeparateShader : false);
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/* Compute the output vertex size.
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*
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* From the Ivy Bridge PRM, Vol2 Part1 7.2.1.1 STATE_GS - Output Vertex
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* Size (p168):
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*
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* [0,62] indicating [1,63] 16B units
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*
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* Specifies the size of each vertex stored in the GS output entry
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* (following any Control Header data) as a number of 128-bit units
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* (minus one).
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*
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* Programming Restrictions: The vertex size must be programmed as a
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* multiple of 32B units with the following exception: Rendering is
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* disabled (as per SOL stage state) and the vertex size output by the
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* GS thread is 16B.
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*
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* If rendering is enabled (as per SOL state) the vertex size must be
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* programmed as a multiple of 32B units. In other words, the only time
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* software can program a vertex size with an odd number of 16B units
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* is when rendering is disabled.
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*
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* Note: B=bytes in the above text.
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*
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* It doesn't seem worth the extra trouble to optimize the case where the
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* vertex size is 16B (especially since this would require special-casing
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* the GEN assembly that writes to the URB). So we just set the vertex
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* size to a multiple of 32B (2 vec4's) in all cases.
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*
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* The maximum output vertex size is 62*16 = 992 bytes (31 hwords). We
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* budget that as follows:
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*
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* 512 bytes for varyings (a varying component is 4 bytes and
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* gl_MaxGeometryOutputComponents = 128)
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* 16 bytes overhead for VARYING_SLOT_PSIZ (each varying slot is 16
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* bytes)
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* 16 bytes overhead for gl_Position (we allocate it a slot in the VUE
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* even if it's not used)
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* 32 bytes overhead for gl_ClipDistance (we allocate it 2 VUE slots
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* whenever clip planes are enabled, even if the shader doesn't
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* write to gl_ClipDistance)
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* 16 bytes overhead since the VUE size must be a multiple of 32 bytes
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* (see below)--this causes up to 1 VUE slot to be wasted
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* 400 bytes available for varying packing overhead
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*
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* Worst-case varying packing overhead is 3/4 of a varying slot (12 bytes)
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* per interpolation type, so this is plenty.
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*
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*/
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unsigned output_vertex_size_bytes = c.prog_data.base.vue_map.num_slots * 16;
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assert(brw->gen == 6 ||
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output_vertex_size_bytes <= GEN7_MAX_GS_OUTPUT_VERTEX_SIZE_BYTES);
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c.prog_data.output_vertex_size_hwords =
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ALIGN(output_vertex_size_bytes, 32) / 32;
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/* Compute URB entry size. The maximum allowed URB entry size is 32k.
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* That divides up as follows:
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*
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* 64 bytes for the control data header (cut indices or StreamID bits)
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* 4096 bytes for varyings (a varying component is 4 bytes and
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* gl_MaxGeometryTotalOutputComponents = 1024)
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* 4096 bytes overhead for VARYING_SLOT_PSIZ (each varying slot is 16
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* bytes/vertex and gl_MaxGeometryOutputVertices is 256)
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* 4096 bytes overhead for gl_Position (we allocate it a slot in the VUE
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* even if it's not used)
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* 8192 bytes overhead for gl_ClipDistance (we allocate it 2 VUE slots
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* whenever clip planes are enabled, even if the shader doesn't
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* write to gl_ClipDistance)
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* 4096 bytes overhead since the VUE size must be a multiple of 32
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* bytes (see above)--this causes up to 1 VUE slot to be wasted
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* 8128 bytes available for varying packing overhead
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*
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* Worst-case varying packing overhead is 3/4 of a varying slot per
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* interpolation type, which works out to 3072 bytes, so this would allow
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* us to accommodate 2 interpolation types without any danger of running
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* out of URB space.
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*
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* In practice, the risk of running out of URB space is very small, since
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* the above figures are all worst-case, and most of them scale with the
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* number of output vertices. So we'll just calculate the amount of space
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* we need, and if it's too large, fail to compile.
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*
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* The above is for gen7+ where we have a single URB entry that will hold
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* all the output. In gen6, we will have to allocate URB entries for every
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* vertex we emit, so our URB entries only need to be large enough to hold
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* a single vertex. Also, gen6 does not have a control data header.
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*/
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unsigned output_size_bytes;
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if (brw->gen >= 7) {
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output_size_bytes =
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c.prog_data.output_vertex_size_hwords * 32 * gp->program.VerticesOut;
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output_size_bytes += 32 * c.prog_data.control_data_header_size_hwords;
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} else {
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output_size_bytes = c.prog_data.output_vertex_size_hwords * 32;
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}
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/* Broadwell stores "Vertex Count" as a full 8 DWord (32 byte) URB output,
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* which comes before the control header.
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*/
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if (brw->gen >= 8)
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output_size_bytes += 32;
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assert(output_size_bytes >= 1);
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int max_output_size_bytes = GEN7_MAX_GS_URB_ENTRY_SIZE_BYTES;
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if (brw->gen == 6)
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max_output_size_bytes = GEN6_MAX_GS_URB_ENTRY_SIZE_BYTES;
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if (output_size_bytes > max_output_size_bytes)
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return false;
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/* URB entry sizes are stored as a multiple of 64 bytes in gen7+ and
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* a multiple of 128 bytes in gen6.
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*/
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if (brw->gen >= 7)
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c.prog_data.base.urb_entry_size = ALIGN(output_size_bytes, 64) / 64;
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else
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c.prog_data.base.urb_entry_size = ALIGN(output_size_bytes, 128) / 128;
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/* FIXME: Need to pull this from nir shader. */
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c.prog_data.output_topology = _3DPRIM_TRISTRIP;
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/* The GLSL linker will have already matched up GS inputs and the outputs
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* of prior stages. The driver does extend VS outputs in some cases, but
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* only for legacy OpenGL or Gen4-5 hardware, neither of which offer
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* geometry shader support. So we can safely ignore that.
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*
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* For SSO pipelines, we use a fixed VUE map layout based on variable
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* locations, so we can rely on rendezvous-by-location making this work.
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*
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* However, we need to ignore VARYING_SLOT_PRIMITIVE_ID, as it's not
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* written by previous stages and shows up via payload magic.
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*/
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GLbitfield64 inputs_read =
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gp->program.Base.InputsRead & ~VARYING_BIT_PRIMITIVE_ID;
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brw_compute_vue_map(brw->intelScreen->devinfo,
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&c.input_vue_map, inputs_read,
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prog->SeparateShader);
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/* GS inputs are read from the VUE 256 bits (2 vec4's) at a time, so we
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* need to program a URB read length of ceiling(num_slots / 2).
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*/
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c.prog_data.base.urb_read_length = (c.input_vue_map.num_slots + 1) / 2;
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void *mem_ctx = ralloc_context(NULL);
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unsigned program_size;
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const unsigned *program =
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brw_compile_gs(brw->intelScreen->compiler, brw, &c, gp->program.Base.nir,
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prog, mem_ctx, -1, &program_size, NULL);
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if (program == NULL) {
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ralloc_free(mem_ctx);
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return false;
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}
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pipeline->gs_vec4 = upload_kernel(pipeline, program, program_size);
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pipeline->gs_vertex_count = gp->program.VerticesIn;
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ralloc_free(mem_ctx);
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return true;
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}
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static bool
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brw_codegen_cs_prog(struct brw_context *brw,
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struct gl_shader_program *prog,
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@@ -1103,23 +844,9 @@ anv_compiler_run(struct anv_compiler *compiler, struct anv_pipeline *pipeline)
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pipeline->vs_vec4 = NO_KERNEL;
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}
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if (pipeline->shaders[VK_SHADER_STAGE_GEOMETRY]) {
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struct brw_gs_prog_key gs_key;
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struct gl_geometry_program *gp = (struct gl_geometry_program *)
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program->_LinkedShaders[MESA_SHADER_GEOMETRY]->Program;
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struct brw_geometry_program *bgp = brw_geometry_program(gp);
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success = anv_codegen_gs_prog(brw, program, bgp, &gs_key, pipeline);
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fail_if(!success, "do_gs_prog failed\n");
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add_compiled_stage(pipeline, VK_SHADER_STAGE_GEOMETRY,
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&pipeline->gs_prog_data.base.base);
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if (gp->Base.OutputsWritten & VARYING_SLOT_PSIZ)
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pipeline->writes_point_size = true;
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} else {
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pipeline->gs_vec4 = NO_KERNEL;
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}
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/* Geometry shaders not yet supported */
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anv_assert(pipeline->shaders[VK_SHADER_STAGE_GEOMETRY] == NULL);
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pipeline->gs_vec4 = NO_KERNEL;
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if (pipeline->shaders[VK_SHADER_STAGE_FRAGMENT]) {
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struct brw_wm_prog_key wm_key;
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