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i965/fs: Use the actual regsister width in brw_reg_from_fs_reg

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This fixes a bug where 1-wide operations don't properly translate down to
1-wide instructions.

Signed-off-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
This commit is contained in:
Jason Ekstrand
2014-10-01 10:46:48 -07:00
parent 75986830b4
commit b33e5465a7
1 changed files with 13 additions and 0 deletions
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src/mesa/drivers/dri/i965/brw_fs_generator.cpp
+13
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@@ -1211,7 +1211,20 @@ brw_reg_from_fs_reg(fs_reg *reg)
case MRF:
if (reg->stride == 0) {
brw_reg = brw_vec1_reg(brw_file_from_reg(reg), reg->reg, 0);
} else if (reg->width < 8) {
brw_reg = brw_vec8_reg(brw_file_from_reg(reg), reg->reg, 0);
brw_reg = stride(brw_reg, reg->width * reg->stride,
reg->width, reg->stride);
} else {
/* From the Haswell PRM:
*
* VertStride must be used to cross GRF register boundaries. This
* rule implies that elements within a 'Width' cannot cross GRF
* boundaries.
*
* So, for registers with width > 8, we have to use a width of 8
* and trust the compression state to sort out the exec size.
*/
brw_reg = brw_vec8_reg(brw_file_from_reg(reg), reg->reg, 0);
brw_reg = stride(brw_reg, 8 * reg->stride, 8, reg->stride);
}