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i965/gen7: Increase the WM threads to hardware limits.

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This thread count is only supposed to be enabled when "WIZ Hashing Disable in
GT_MODE register enabled."  I've always been confused whether that means the
bit in the register should be 1 or 0.  For my IVB GT2's register 0x7008 value
of 0x0, this appears to work fine.

Improves l4d2 performance at 640x480 by 0.88 +/- 0.11% (n=88).  Improves
performance with rasterization at 1280x1024 by 1.45% +/- 0.36% (n=6).

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
This commit is contained in:
Eric Anholt
2012-07-18 22:58:15 -07:00
parent 8ab5842a6d
commit b2a44cde64
1 changed files with 1 additions and 1 deletions
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src/mesa/drivers/dri/i965/brw_context.c
+1 -1
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@@ -248,7 +248,7 @@ brwCreateContext(int api,
brw->urb.max_vs_entries = 512;
brw->urb.max_gs_entries = 192;
} else if (intel->gt == 2) {
brw->max_wm_threads = 86;
brw->max_wm_threads = 172;
brw->max_vs_threads = 128;
brw->max_gs_threads = 128;
brw->urb.size = 256;