r600g/compute: disable unused colorbuffer slots
Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Tested-by: Tom Stellard <thomas.stellard@amd.com>
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@@ -412,7 +412,8 @@ static void compute_emit_cs(struct r600_context *ctx, const uint *block_layout,
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r600_flush_emit(ctx);
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/* Emit colorbuffers. */
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for (i = 0; i < ctx->framebuffer.state.nr_cbufs; i++) {
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/* XXX support more than 8 colorbuffers (the offsets are not a multiple of 0x3C for CB8-11) */
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for (i = 0; i < 8 && i < ctx->framebuffer.state.nr_cbufs; i++) {
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struct r600_surface *cb = (struct r600_surface*)ctx->framebuffer.state.cbufs[i];
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unsigned reloc = r600_context_bo_reloc(ctx, &ctx->rings.gfx,
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(struct r600_resource*)cb->base.texture,
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@@ -438,6 +439,16 @@ static void compute_emit_cs(struct r600_context *ctx, const uint *block_layout,
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r600_write_value(cs, PKT3(PKT3_NOP, 0, 0)); /* R_028C74_CB_COLOR0_ATTRIB */
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r600_write_value(cs, reloc);
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}
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if (ctx->keep_tiling_flags) {
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for (; i < 8 ; i++) {
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r600_write_compute_context_reg(cs, R_028C70_CB_COLOR0_INFO + i * 0x3C,
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S_028C70_FORMAT(V_028C70_COLOR_INVALID));
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}
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for (; i < 12; i++) {
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r600_write_compute_context_reg(cs, R_028E50_CB_COLOR8_INFO + (i - 8) * 0x1C,
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S_028C70_FORMAT(V_028C70_COLOR_INVALID));
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}
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}
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/* Set CB_TARGET_MASK XXX: Use cb_misc_state */
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r600_write_compute_context_reg(cs, R_028238_CB_TARGET_MASK,
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